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Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02001/*
Julius Wernerefd09a72019-07-23 20:00:13 -07002 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02007#include <assert.h>
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02008#include <errno.h>
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02009#include <stddef.h>
10#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011
12#include <platform_def.h>
13
14#include <arch.h>
15#include <arch_helpers.h>
16#include <bl31/bl31.h>
17#include <common/bl_common.h>
18#include <common/debug.h>
19#include <cortex_a53.h>
20#include <drivers/arm/pl011.h>
21#include <drivers/generic_delay_timer.h>
22#include <lib/mmio.h>
23#include <plat/common/platform.h>
24
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020025#include "hi3798cv200.h"
26#include "plat_private.h"
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020027
Jiancheng Xueb88b08a2017-08-28 18:55:43 +080028#define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45)
29
Victor Chong662556a2017-10-28 01:59:41 +090030static entry_point_info_t bl32_image_ep_info;
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020031static entry_point_info_t bl33_image_ep_info;
Andre Przywara2b1b1a52020-01-25 00:58:35 +000032static console_t console;
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020033
Jiancheng Xueb88b08a2017-08-28 18:55:43 +080034static void hisi_tzpc_sec_init(void)
35{
36 mmio_write_32(HISI_TZPC_SEC_ATTR_CTRL, TZPC_SEC_ATTR_CTRL_VALUE);
37}
38
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020039entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
40{
Victor Chong662556a2017-10-28 01:59:41 +090041 entry_point_info_t *next_image_info;
42
43 assert(sec_state_is_valid(type));
44 next_image_info = (type == NON_SECURE)
45 ? &bl33_image_ep_info : &bl32_image_ep_info;
46 /*
47 * None of the images on the ARM development platforms can have 0x0
48 * as the entrypoint
49 */
50 if (next_image_info->pc)
51 return next_image_info;
52 else
53 return NULL;
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020054}
55
Victor Chong175dd8a2018-02-01 00:35:22 +090056/*******************************************************************************
57 * Perform any BL31 early platform setup common to ARM standard platforms.
58 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
John Tsichritzisd653d332018-09-14 10:34:57 +010059 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
Victor Chong175dd8a2018-02-01 00:35:22 +090060 * done before the MMU is initialized so that the memory layout can be used
61 * while creating page tables. BL2 has flushed this information to memory, so
62 * we are guaranteed to pick up good data.
63 ******************************************************************************/
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010064void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
65 u_register_t arg2, u_register_t arg3)
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020066{
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010067 void *from_bl2;
68
69 from_bl2 = (void *) arg0;
70
Jerome Forissier74a19f22018-11-08 11:57:30 +000071 console_pl011_register(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ,
72 PL011_BAUDRATE, &console);
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020073
74 /* Init console for crash report */
75 plat_crash_console_init();
76
Victor Chong175dd8a2018-02-01 00:35:22 +090077 /*
78 * Check params passed from BL2 should not be NULL,
79 */
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010080 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
81
Victor Chong175dd8a2018-02-01 00:35:22 +090082 assert(params_from_bl2 != NULL);
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010083 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
84 assert(params_from_bl2->h.version >= VERSION_2);
85
86 bl_params_node_t *bl_params = params_from_bl2->head;
Victor Chong662556a2017-10-28 01:59:41 +090087
88 /*
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010089 * Copy BL33 and BL32 (if present), entry point information.
Victor Chong662556a2017-10-28 01:59:41 +090090 * They are stored in Secure RAM, in BL2's address space.
91 */
Antonio Nino Diaze93cde12018-09-24 17:15:15 +010092 while (bl_params) {
93 if (bl_params->image_id == BL32_IMAGE_ID)
94 bl32_image_ep_info = *bl_params->ep_info;
95
96 if (bl_params->image_id == BL33_IMAGE_ID)
97 bl33_image_ep_info = *bl_params->ep_info;
98
99 bl_params = bl_params->next_params_info;
100 }
101
102 if (bl33_image_ep_info.pc == 0)
103 panic();
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +0200104}
105
106void bl31_platform_setup(void)
107{
108 /* Init arch timer */
109 generic_delay_timer_init();
110
111 /* Init GIC distributor and CPU interface */
Antonio Nino Diaz6766bb12018-10-26 11:12:31 +0100112 poplar_gic_driver_init();
113 poplar_gic_init();
Jiancheng Xueb88b08a2017-08-28 18:55:43 +0800114
115 /* Init security properties of IP blocks */
116 hisi_tzpc_sec_init();
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +0200117}
118
119void bl31_plat_runtime_setup(void)
120{
121 /* do nothing */
122}
123
124void bl31_plat_arch_setup(void)
125{
Victor Chong175dd8a2018-02-01 00:35:22 +0900126 plat_configure_mmu_el3(BL31_BASE,
127 (BL31_LIMIT - BL31_BASE),
Antonio Nino Diazde97ff32019-01-25 13:28:38 +0000128 BL_CODE_BASE,
129 BL_CODE_END,
130 BL_COHERENT_RAM_BASE,
131 BL_COHERENT_RAM_END);
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +0200132
Julius Wernerefd09a72019-07-23 20:00:13 -0700133 INFO("Boot BL33 from 0x%lx for %llu Bytes\n",
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +0200134 bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2);
135}