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git01.mediatek.com / filogic / atf / 38bde411b1a7a9b57d7389651130490bbb23334b / . / lib / arch / aarch64 / tlb_helpers.S
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Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]1/*
Dan Handleye83b0ca2014-01-14 18:17:09 +0000[diff] [blame]2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]32#include <asm_macros.S>
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]33
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]34 .globl tlbialle1
35 .globl tlbialle1is
36 .globl tlbialle2
37 .globl tlbialle2is
38 .globl tlbialle3
39 .globl tlbialle3is
40 .globl tlbivmalle1
41
42
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]43func tlbialle1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]44 tlbi alle1
45 dsb sy
46 isb
47 ret
48
49
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]50func tlbialle1is
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]51 tlbi alle1is
52 dsb sy
53 isb
54 ret
55
56
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]57func tlbialle2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]58 tlbi alle2
59 dsb sy
60 isb
61 ret
62
63
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]64func tlbialle2is
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]65 tlbi alle2is
66 dsb sy
67 isb
68 ret
69
70
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]71func tlbialle3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]72 tlbi alle3
73 dsb sy
74 isb
75 ret
76
77
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]78func tlbialle3is
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]79 tlbi alle3is
80 dsb sy
81 isb
82 ret
83
Andrew Thoelke38bde412014-03-18 13:46:55 +0000[diff] [blame^]84func tlbivmalle1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100[diff] [blame]85 tlbi vmalle1
86 dsb sy
87 isb
88 ret