| Jorge Ramirez-Ortiz | bf084dc | 2018-09-23 09:36:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch_helpers.h> |
| Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | #include <common/bl_common.h> |
| 9 | #include <common/debug.h> |
| 10 | #include <common/runtime_svc.h> |
| 11 | #include <drivers/arm/gicv2.h> |
| 12 | #include <lib/mmio.h> |
| 13 | |
| Jorge Ramirez-Ortiz | bf084dc | 2018-09-23 09:36:13 +0200 | [diff] [blame] | 14 | #include "rcar_def.h" |
| 15 | |
| 16 | #define SWDT_ERROR_ID (1024U) |
| 17 | #define SWDT_ERROR_TYPE (16U) |
| 18 | #define SWDT_CHAR_MAX (13U) |
| 19 | |
| 20 | extern void rcar_swdt_release(void); |
| 21 | |
| 22 | void bl2_interrupt_error_id(uint32_t int_id) |
| 23 | { |
| 24 | ERROR("\n"); |
| 25 | if (int_id >= SWDT_ERROR_ID) { |
| 26 | ERROR("Unhandled exception occurred.\n"); |
| 27 | ERROR(" Exception type = FIQ_SP_ELX\n"); |
| 28 | panic(); |
| 29 | } |
| 30 | |
| 31 | /* Clear the interrupt request */ |
| 32 | gicv2_end_of_interrupt((uint32_t) int_id); |
| 33 | rcar_swdt_release(); |
| 34 | ERROR("Unhandled exception occurred.\n"); |
| 35 | ERROR(" Exception type = FIQ_SP_ELX\n"); |
| 36 | ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); |
| 37 | ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); |
| 38 | ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); |
| 39 | ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); |
| 40 | ERROR("\n"); |
| 41 | panic(); |
| 42 | } |
| 43 | |
| 44 | void bl2_interrupt_error_type(uint32_t ex_type) |
| 45 | { |
| 46 | const uint8_t interrupt_ex[SWDT_ERROR_TYPE][SWDT_CHAR_MAX] = { |
| 47 | "SYNC SP EL0", |
| 48 | "IRQ SP EL0", |
| 49 | "FIQ SP EL0", |
| 50 | "SERR SP EL0", |
| 51 | "SYNC SP ELx", |
| 52 | "IRQ SP ELx", |
| 53 | "FIQ SP ELx", |
| 54 | "SERR SP ELx", |
| 55 | "SYNC AARCH64", |
| 56 | "IRQ AARCH64", |
| 57 | "FIQ AARCH64", |
| 58 | "SERR AARCH64", |
| 59 | "SYNC AARCH32", |
| 60 | "IRQ AARCH32", |
| 61 | "FIQ AARCH32", |
| 62 | "SERR AARCH32" |
| 63 | }; |
| 64 | char msg[128]; |
| 65 | |
| 66 | /* Clear the interrupt request */ |
| 67 | if (ex_type >= SWDT_ERROR_TYPE) { |
| 68 | ERROR("\n"); |
| 69 | ERROR("Unhandled exception occurred.\n"); |
| 70 | ERROR(" Exception type = Unknown (%d)\n", ex_type); |
| 71 | goto loop; |
| 72 | } |
| 73 | |
| 74 | rcar_swdt_release(); |
| 75 | ERROR("\n"); |
| 76 | ERROR("Unhandled exception occurred.\n"); |
| 77 | snprintf(msg, sizeof(msg), " Exception type = %s\n", |
| 78 | &interrupt_ex[ex_type][0]); |
| 79 | ERROR("%s", msg); |
| 80 | switch (ex_type) { |
| 81 | case SYNC_EXCEPTION_SP_ELX: |
| 82 | ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); |
| 83 | ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); |
| 84 | ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); |
| 85 | ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); |
| 86 | break; |
| 87 | case IRQ_SP_ELX: |
| 88 | ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); |
| 89 | ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); |
| 90 | ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt()); |
| 91 | break; |
| 92 | case FIQ_SP_ELX: |
| 93 | ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); |
| 94 | ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); |
| 95 | ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt()); |
| 96 | break; |
| 97 | case SERROR_SP_ELX: |
| 98 | ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); |
| 99 | ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); |
| 100 | ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); |
| 101 | ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); |
| 102 | break; |
| 103 | default: |
| 104 | break; |
| 105 | } |
| 106 | loop: |
| 107 | ERROR("\n"); |
| 108 | panic(); |
| 109 | } |