Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __PLAT_PRIVATE_H__ |
| 32 | #define __PLAT_PRIVATE_H__ |
| 33 | |
| 34 | #ifndef __ASSEMBLY__ |
| 35 | #include <mmio.h> |
| 36 | #include <stdint.h> |
| 37 | #include <xlat_tables.h> |
Tony Xie | 42e113e | 2016-07-16 11:16:51 +0800 | [diff] [blame] | 38 | #include <psci.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 39 | |
Caesar Wang | d90f43e | 2016-10-11 09:36:00 +0800 | [diff] [blame] | 40 | #define __sramdata __attribute__((section(".sram.data"))) |
| 41 | #define __sramconst __attribute__((section(".sram.rodata"))) |
| 42 | #define __sramfunc __attribute__((section(".sram.text"))) \ |
| 43 | __attribute__((noinline)) |
| 44 | |
| 45 | extern uint32_t __bl31_sram_text_start, __bl31_sram_text_end; |
| 46 | extern uint32_t __bl31_sram_data_start, __bl31_sram_data_end; |
Xing Zheng | 93280b7 | 2016-10-26 21:25:26 +0800 | [diff] [blame] | 47 | extern uint32_t __sram_incbin_start, __sram_incbin_end; |
Caesar Wang | d90f43e | 2016-10-11 09:36:00 +0800 | [diff] [blame] | 48 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 49 | |
| 50 | /****************************************************************************** |
| 51 | * The register have write-mask bits, it is mean, if you want to set the bits, |
| 52 | * you needs set the write-mask bits at the same time, |
| 53 | * The write-mask bits is in high 16-bits. |
| 54 | * The fllowing macro definition helps access write-mask bits reg efficient! |
| 55 | ******************************************************************************/ |
| 56 | #define REG_MSK_SHIFT 16 |
| 57 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 58 | #ifndef WMSK_BIT |
| 59 | #define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT) |
| 60 | #endif |
| 61 | |
| 62 | /* set one bit with write mask */ |
| 63 | #ifndef BIT_WITH_WMSK |
| 64 | #define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr)) |
| 65 | #endif |
| 66 | |
| 67 | #ifndef BITS_SHIFT |
| 68 | #define BITS_SHIFT(bits, shift) (bits << (shift)) |
| 69 | #endif |
| 70 | |
| 71 | #ifndef BITS_WITH_WMASK |
Caesar Wang | 59e41b5 | 2016-04-10 14:11:07 +0800 | [diff] [blame] | 72 | #define BITS_WITH_WMASK(bits, msk, shift)\ |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 73 | (BITS_SHIFT(bits, shift) | BITS_SHIFT(msk, (shift + REG_MSK_SHIFT))) |
| 74 | #endif |
| 75 | |
| 76 | /****************************************************************************** |
| 77 | * Function and variable prototypes |
| 78 | *****************************************************************************/ |
| 79 | void plat_configure_mmu_el3(unsigned long total_base, |
| 80 | unsigned long total_size, |
| 81 | unsigned long, |
| 82 | unsigned long, |
| 83 | unsigned long, |
| 84 | unsigned long); |
| 85 | |
| 86 | void plat_cci_init(void); |
| 87 | void plat_cci_enable(void); |
| 88 | void plat_cci_disable(void); |
| 89 | |
| 90 | void plat_delay_timer_init(void); |
| 91 | |
Caesar Wang | 3e3c5b0 | 2016-05-25 19:03:04 +0800 | [diff] [blame] | 92 | void params_early_setup(void *plat_params_from_bl2); |
| 93 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 94 | void plat_rockchip_gic_driver_init(void); |
| 95 | void plat_rockchip_gic_init(void); |
| 96 | void plat_rockchip_gic_cpuif_enable(void); |
| 97 | void plat_rockchip_gic_cpuif_disable(void); |
| 98 | void plat_rockchip_gic_pcpu_init(void); |
| 99 | |
| 100 | void plat_rockchip_pmusram_prepare(void); |
| 101 | void plat_rockchip_pmu_init(void); |
| 102 | void plat_rockchip_soc_init(void); |
Tony Xie | 42e113e | 2016-07-16 11:16:51 +0800 | [diff] [blame] | 103 | uintptr_t plat_get_sec_entrypoint(void); |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 104 | |
Caesar Wang | 59e41b5 | 2016-04-10 14:11:07 +0800 | [diff] [blame] | 105 | void platform_cpu_warmboot(void); |
| 106 | |
Caesar Wang | ef18007 | 2016-09-10 02:43:15 +0800 | [diff] [blame] | 107 | struct gpio_info *plat_get_rockchip_gpio_reset(void); |
| 108 | struct gpio_info *plat_get_rockchip_gpio_poweroff(void); |
| 109 | struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count); |
Caesar Wang | 5045a1c | 2016-09-10 02:47:53 +0800 | [diff] [blame] | 110 | struct apio_info *plat_get_rockchip_suspend_apio(void); |
Caesar Wang | 038f6aa | 2016-05-25 19:21:43 +0800 | [diff] [blame] | 111 | void plat_rockchip_gpio_init(void); |
| 112 | |
tony.xie | 422d51c | 2017-03-01 11:05:17 +0800 | [diff] [blame] | 113 | int rockchip_soc_cores_pwr_dm_on(unsigned long mpidr, uint64_t entrypoint); |
| 114 | int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl, |
| 115 | plat_local_state_t lvl_state); |
| 116 | int rockchip_soc_cores_pwr_dm_off(void); |
| 117 | int rockchip_soc_sys_pwr_dm_suspend(void); |
| 118 | int rockchip_soc_cores_pwr_dm_suspend(void); |
| 119 | int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, |
| 120 | plat_local_state_t lvl_state); |
| 121 | int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl, |
| 122 | plat_local_state_t lvl_state); |
| 123 | int rockchip_soc_cores_pwr_dm_on_finish(void); |
| 124 | int rockchip_soc_sys_pwr_dm_resume(void); |
| 125 | |
| 126 | int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, |
| 127 | plat_local_state_t lvl_state); |
| 128 | int rockchip_soc_cores_pwr_dm_resume(void); |
| 129 | void __dead2 rockchip_soc_soft_reset(void); |
| 130 | void __dead2 rockchip_soc_system_off(void); |
| 131 | void __dead2 rockchip_soc_cores_pd_pwr_dn_wfi( |
| 132 | const psci_power_state_t *target_state); |
| 133 | void __dead2 rockchip_soc_sys_pd_pwr_dn_wfi(void); |
| 134 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 135 | extern const unsigned char rockchip_power_domain_tree_desc[]; |
| 136 | |
| 137 | extern void *pmu_cpuson_entrypoint_start; |
| 138 | extern void *pmu_cpuson_entrypoint_end; |
| 139 | extern uint64_t cpuson_entry_point[PLATFORM_CORE_COUNT]; |
| 140 | extern uint32_t cpuson_flags[PLATFORM_CORE_COUNT]; |
| 141 | |
| 142 | extern const mmap_region_t plat_rk_mmap[]; |
Caesar Wang | d90f43e | 2016-10-11 09:36:00 +0800 | [diff] [blame] | 143 | |
| 144 | void rockchip_plat_sram_mmu_el3(void); |
| 145 | void plat_rockchip_mem_prepare(void); |
| 146 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 147 | #endif /* __ASSEMBLY__ */ |
| 148 | |
Tony Xie | 42e113e | 2016-07-16 11:16:51 +0800 | [diff] [blame] | 149 | /****************************************************************************** |
| 150 | * cpu up status |
| 151 | * The bits of macro value is not more than 12 bits for cmp instruction! |
| 152 | ******************************************************************************/ |
| 153 | #define PMU_CPU_HOTPLUG 0xf00 |
| 154 | #define PMU_CPU_AUTO_PWRDN 0xf0 |
| 155 | #define PMU_CLST_RET 0xa5 |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 156 | |
| 157 | #endif /* __PLAT_PRIVATE_H__ */ |