Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013, ARM Limited. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <string.h> |
| 32 | #include <assert.h> |
| 33 | #include <arch_helpers.h> |
| 34 | #include <platform.h> |
| 35 | #include <bl2.h> |
| 36 | #include <bl_common.h> |
| 37 | |
| 38 | /******************************************************************************* |
| 39 | * Declarations of linker defined symbols which will help us find the layout |
| 40 | * of trusted SRAM |
| 41 | ******************************************************************************/ |
| 42 | #if defined (__GNUC__) |
| 43 | extern unsigned long __BL2_RO_BASE__; |
| 44 | extern unsigned long __BL2_STACKS_BASE__; |
| 45 | extern unsigned long __BL2_COHERENT_RAM_BASE__; |
| 46 | extern unsigned long __BL2_RW_BASE__; |
| 47 | |
| 48 | #define BL2_RO_BASE __BL2_RO_BASE__ |
| 49 | #define BL2_STACKS_BASE __BL2_STACKS_BASE__ |
| 50 | #define BL2_COHERENT_RAM_BASE __BL2_COHERENT_RAM_BASE__ |
| 51 | #define BL2_RW_BASE __BL2_RW_BASE__ |
| 52 | |
| 53 | #else |
| 54 | #error "Unknown compiler." |
| 55 | #endif |
| 56 | |
| 57 | /* Pointer to memory visible to both BL2 and BL31 for passing data */ |
| 58 | extern unsigned char **bl2_el_change_mem_ptr; |
| 59 | |
| 60 | /* Data structure which holds the extents of the trusted SRAM for BL2 */ |
| 61 | static meminfo bl2_tzram_layout |
| 62 | __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), |
Sandrine Bailleux | 204aa03 | 2013-10-28 15:14:00 +0000 | [diff] [blame] | 63 | section("tzfw_coherent_mem"))); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 64 | |
| 65 | /* Data structure which holds the extents of the non-trusted DRAM for BL2*/ |
Sandrine Bailleux | 204aa03 | 2013-10-28 15:14:00 +0000 | [diff] [blame] | 66 | static meminfo dram_layout; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 67 | |
| 68 | meminfo bl2_get_sec_mem_layout(void) |
| 69 | { |
| 70 | return bl2_tzram_layout; |
| 71 | } |
| 72 | |
| 73 | meminfo bl2_get_ns_mem_layout(void) |
| 74 | { |
| 75 | return dram_layout; |
| 76 | } |
| 77 | |
| 78 | /******************************************************************************* |
| 79 | * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 |
| 80 | * in x0. This memory layout is sitting at the base of the free trusted SRAM. |
| 81 | * Copy it to a safe loaction before its reclaimed by later BL2 functionality. |
| 82 | ******************************************************************************/ |
| 83 | void bl2_early_platform_setup(meminfo *mem_layout, |
| 84 | void *data) |
| 85 | { |
| 86 | /* Setup the BL2 memory layout */ |
| 87 | bl2_tzram_layout.total_base = mem_layout->total_base; |
| 88 | bl2_tzram_layout.total_size = mem_layout->total_size; |
| 89 | bl2_tzram_layout.free_base = mem_layout->free_base; |
| 90 | bl2_tzram_layout.free_size = mem_layout->free_size; |
| 91 | bl2_tzram_layout.attr = mem_layout->attr; |
| 92 | bl2_tzram_layout.next = 0; |
| 93 | |
| 94 | /* Initialize the platform config for future decision making */ |
| 95 | platform_config_setup(); |
| 96 | |
| 97 | return; |
| 98 | } |
| 99 | |
| 100 | /******************************************************************************* |
| 101 | * Not much to do here aprt from finding out the extents of non-trusted DRAM |
| 102 | * which will be used for loading the non-trusted software images. We are |
| 103 | * relying on pre-iniitialized zi memory so there is nothing to zero out like |
| 104 | * in BL1. This is 'cause BL2 is raw PIC binary. Its load address is determined |
| 105 | * at runtime. The ZI section might be lost if its not already there. |
| 106 | ******************************************************************************/ |
| 107 | void bl2_platform_setup() |
| 108 | { |
| 109 | dram_layout.total_base = DRAM_BASE; |
| 110 | dram_layout.total_size = DRAM_SIZE; |
| 111 | dram_layout.free_base = DRAM_BASE; |
| 112 | dram_layout.free_size = DRAM_SIZE; |
| 113 | dram_layout.attr = 0; |
| 114 | |
| 115 | /* Use the Trusted DRAM for passing args to BL31 */ |
| 116 | bl2_el_change_mem_ptr = (unsigned char **) TZDRAM_BASE; |
| 117 | |
| 118 | return; |
| 119 | } |
| 120 | |
| 121 | /******************************************************************************* |
| 122 | * Perform the very early platform specific architectural setup here. At the |
| 123 | * moment this is only intializes the mmu in a quick and dirty way. |
| 124 | ******************************************************************************/ |
| 125 | void bl2_plat_arch_setup() |
| 126 | { |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 127 | configure_mmu(&bl2_tzram_layout, |
| 128 | (unsigned long) &BL2_RO_BASE, |
| 129 | (unsigned long) &BL2_STACKS_BASE, |
| 130 | (unsigned long) &BL2_COHERENT_RAM_BASE, |
| 131 | (unsigned long) &BL2_RW_BASE); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 132 | } |