Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 1 | /* |
Soby Mathew | 68ea954 | 2022-03-22 13:58:52 +0000 | [diff] [blame] | 2 | * Copyright (c) 2021-2022, Arm Limited. All rights reserved. |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <asm_macros.S> |
Soby Mathew | 68ea954 | 2022-03-22 13:58:52 +0000 | [diff] [blame] | 8 | #include <services/rmmd_svc.h> |
Javier Almansa Sobrino | 7176a77 | 2021-11-24 18:37:37 +0000 | [diff] [blame] | 9 | |
| 10 | #include <platform_def.h> |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 11 | #include "trp_private.h" |
| 12 | |
| 13 | .global trp_head |
| 14 | .global trp_smc |
| 15 | |
| 16 | .section ".head.text", "ax" |
| 17 | |
| 18 | /* --------------------------------------------- |
| 19 | * Populate the params in x0-x7 from the pointer |
| 20 | * to the smc args structure in x0. |
| 21 | * --------------------------------------------- |
| 22 | */ |
| 23 | .macro restore_args_call_smc |
| 24 | ldp x6, x7, [x0, #TRP_ARG6] |
| 25 | ldp x4, x5, [x0, #TRP_ARG4] |
| 26 | ldp x2, x3, [x0, #TRP_ARG2] |
| 27 | ldp x0, x1, [x0, #TRP_ARG0] |
| 28 | smc #0 |
| 29 | .endm |
| 30 | |
| 31 | /* --------------------------------------------- |
| 32 | * Entry point for TRP |
| 33 | * --------------------------------------------- |
| 34 | */ |
| 35 | trp_head: |
Javier Almansa Sobrino | 7176a77 | 2021-11-24 18:37:37 +0000 | [diff] [blame] | 36 | /* |
| 37 | * Stash arguments from previous boot stage |
| 38 | */ |
| 39 | mov x20, x0 |
| 40 | mov x21, x1 |
| 41 | mov x22, x2 |
| 42 | mov x23, x3 |
| 43 | |
| 44 | /* |
| 45 | * Validate CPUId before allocating a stack. |
| 46 | */ |
| 47 | cmp x20, #PLATFORM_CORE_COUNT |
| 48 | b.lo 1f |
| 49 | |
| 50 | mov_imm x0, RMM_BOOT_COMPLETE |
| 51 | mov_imm x1, E_RMM_BOOT_CPU_ID_OUT_OF_RANGE |
| 52 | smc #0 |
| 53 | |
| 54 | /* EL3 should never return back here, so panic if it does */ |
| 55 | b trp_panic |
| 56 | |
| 57 | 1: |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 58 | bl plat_set_my_stack |
Mark Dykes | 50746c8 | 2021-12-01 15:08:02 -0600 | [diff] [blame] | 59 | |
| 60 | /* |
| 61 | * Find out whether this is a cold or warm boot |
| 62 | */ |
| 63 | ldr x1, cold_boot_flag |
| 64 | cbz x1, warm_boot |
| 65 | |
| 66 | /* |
| 67 | * Update cold boot flag to indicate cold boot is done |
| 68 | */ |
| 69 | adr x2, cold_boot_flag |
| 70 | str xzr, [x2] |
| 71 | |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 72 | /* --------------------------------------------- |
| 73 | * Zero out BSS section |
| 74 | * --------------------------------------------- |
| 75 | */ |
| 76 | ldr x0, =__BSS_START__ |
| 77 | ldr x1, =__BSS_SIZE__ |
| 78 | bl zeromem |
| 79 | |
Javier Almansa Sobrino | 7176a77 | 2021-11-24 18:37:37 +0000 | [diff] [blame] | 80 | mov x0, x20 |
| 81 | mov x1, x21 |
| 82 | mov x2, x22 |
| 83 | mov x3, x23 |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 84 | bl trp_setup |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 85 | bl trp_main |
Javier Almansa Sobrino | 04a6f2f | 2022-12-01 17:20:45 +0000 | [diff] [blame] | 86 | b 1f |
| 87 | |
Mark Dykes | 50746c8 | 2021-12-01 15:08:02 -0600 | [diff] [blame] | 88 | warm_boot: |
Javier Almansa Sobrino | 04a6f2f | 2022-12-01 17:20:45 +0000 | [diff] [blame] | 89 | mov x0, x20 |
| 90 | mov x1, x21 |
| 91 | mov x2, x22 |
| 92 | mov x3, x23 |
| 93 | bl trp_validate_warmboot_args |
| 94 | cbnz x0, trp_panic /* Failed to validate warmboot args */ |
| 95 | |
| 96 | 1: |
Javier Almansa Sobrino | 7176a77 | 2021-11-24 18:37:37 +0000 | [diff] [blame] | 97 | mov_imm x0, RMM_BOOT_COMPLETE |
| 98 | mov x1, xzr /* RMM_BOOT_SUCCESS */ |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 99 | smc #0 |
| 100 | b trp_handler |
| 101 | |
Javier Almansa Sobrino | 7176a77 | 2021-11-24 18:37:37 +0000 | [diff] [blame] | 102 | trp_panic: |
| 103 | no_ret plat_panic_handler |
| 104 | |
Mark Dykes | 50746c8 | 2021-12-01 15:08:02 -0600 | [diff] [blame] | 105 | /* |
| 106 | * Flag to mark if it is a cold boot. |
| 107 | * 1: cold boot, 0: warmboot. |
| 108 | */ |
| 109 | .align 3 |
| 110 | cold_boot_flag: |
| 111 | .dword 1 |
| 112 | |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 113 | /* --------------------------------------------- |
| 114 | * Direct SMC call to BL31 service provided by |
| 115 | * RMM Dispatcher |
| 116 | * --------------------------------------------- |
| 117 | */ |
| 118 | func trp_smc |
| 119 | restore_args_call_smc |
| 120 | ret |
| 121 | endfunc trp_smc |
| 122 | |
| 123 | /* --------------------------------------------- |
| 124 | * RMI call handler |
| 125 | * --------------------------------------------- |
| 126 | */ |
| 127 | func trp_handler |
AlexeiFedorov | f9044ab | 2022-11-24 13:42:44 +0000 | [diff] [blame] | 128 | /* |
| 129 | * Save Link Register and X4, as per SMCCC v1.2 its value |
| 130 | * must be preserved unless it contains result, as specified |
| 131 | * in the function definition. |
| 132 | */ |
| 133 | stp x4, lr, [sp, #-16]! |
| 134 | |
| 135 | /* |
| 136 | * Zero the space for X0-X3 in trp_smc_result structure |
| 137 | * and pass its address as the last argument. |
| 138 | */ |
| 139 | stp xzr, xzr, [sp, #-16]! |
| 140 | stp xzr, xzr, [sp, #-16]! |
| 141 | mov x7, sp |
| 142 | |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 143 | bl trp_rmi_handler |
AlexeiFedorov | f9044ab | 2022-11-24 13:42:44 +0000 | [diff] [blame] | 144 | |
| 145 | ldp x1, x2, [sp], #16 |
| 146 | ldp x3, x4, [sp], #16 |
| 147 | ldp x5, lr, [sp], #16 |
| 148 | |
| 149 | ldr x0, =RMM_RMI_REQ_COMPLETE |
| 150 | smc #0 |
| 151 | |
Zelalem Aweke | c8bc23e | 2021-07-09 15:32:21 -0500 | [diff] [blame] | 152 | b trp_handler |
| 153 | endfunc trp_handler |