Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | b1f6809 | 2016-08-04 12:44:52 +0100 | [diff] [blame] | 2 | * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __CSS_SCPI_H__ |
| 32 | #define __CSS_SCPI_H__ |
| 33 | |
| 34 | #include <stddef.h> |
| 35 | #include <stdint.h> |
| 36 | |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 37 | /* |
| 38 | * An SCPI command consists of a header and a payload. |
| 39 | * The following structure describes the header. It is 64-bit long. |
| 40 | */ |
| 41 | typedef struct { |
| 42 | /* Command ID */ |
| 43 | uint32_t id : 7; |
| 44 | /* Set ID. Identifies whether this is a standard or extended command. */ |
| 45 | uint32_t set : 1; |
| 46 | /* Sender ID to match a reply. The value is sender specific. */ |
| 47 | uint32_t sender : 8; |
Antonio Nino Diaz | 7be01ec | 2016-02-03 14:41:48 +0000 | [diff] [blame] | 48 | /* Size of the payload in bytes (0 - 511) */ |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 49 | uint32_t size : 9; |
| 50 | uint32_t reserved : 7; |
| 51 | /* |
| 52 | * Status indicating the success of a command. |
| 53 | * See the enum below. |
| 54 | */ |
| 55 | uint32_t status; |
| 56 | } scpi_cmd_t; |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 57 | |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 58 | typedef enum { |
| 59 | SCPI_SET_NORMAL = 0, /* Normal SCPI commands */ |
| 60 | SCPI_SET_EXTENDED /* Extended SCPI commands */ |
| 61 | } scpi_set_t; |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 62 | |
| 63 | enum { |
| 64 | SCP_OK = 0, /* Success */ |
| 65 | SCP_E_PARAM, /* Invalid parameter(s) */ |
| 66 | SCP_E_ALIGN, /* Invalid alignment */ |
| 67 | SCP_E_SIZE, /* Invalid size */ |
| 68 | SCP_E_HANDLER, /* Invalid handler or callback */ |
| 69 | SCP_E_ACCESS, /* Invalid access or permission denied */ |
| 70 | SCP_E_RANGE, /* Value out of range */ |
| 71 | SCP_E_TIMEOUT, /* Time out has ocurred */ |
| 72 | SCP_E_NOMEM, /* Invalid memory area or pointer */ |
| 73 | SCP_E_PWRSTATE, /* Invalid power state */ |
| 74 | SCP_E_SUPPORT, /* Feature not supported or disabled */ |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 75 | SCPI_E_DEVICE, /* Device error */ |
| 76 | SCPI_E_BUSY, /* Device is busy */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | typedef uint32_t scpi_status_t; |
| 80 | |
| 81 | typedef enum { |
| 82 | SCPI_CMD_SCP_READY = 0x01, |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 83 | SCPI_CMD_SET_CSS_POWER_STATE = 0x03, |
Jeenu Viswambharan | b1f6809 | 2016-08-04 12:44:52 +0100 | [diff] [blame] | 84 | SCPI_CMD_GET_CSS_POWER_STATE = 0x04, |
Sandrine Bailleux | 04b66d8 | 2015-03-18 14:52:53 +0000 | [diff] [blame] | 85 | SCPI_CMD_SYS_POWER_STATE = 0x05 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 86 | } scpi_command_t; |
| 87 | |
Jeenu Viswambharan | b1f6809 | 2016-08-04 12:44:52 +0100 | [diff] [blame] | 88 | /* |
| 89 | * Macros to parse SCP response to GET_CSS_POWER_STATE command |
| 90 | * |
| 91 | * [3:0] : cluster ID |
| 92 | * [7:4] : cluster state: 0 = on; 3 = off; rest are reserved |
| 93 | * [15:8]: on/off state for individual CPUs in the cluster |
| 94 | * |
| 95 | * Payload is in little-endian |
| 96 | */ |
| 97 | #define CLUSTER_ID(_resp) ((_resp) & 0xf) |
| 98 | #define CLUSTER_POWER_STATE(_resp) (((_resp) >> 4) & 0xf) |
| 99 | |
| 100 | /* Result is a bit mask of CPU on/off states in the cluster */ |
| 101 | #define CPU_POWER_STATE(_resp) (((_resp) >> 8) & 0xff) |
| 102 | |
| 103 | /* |
| 104 | * For GET_CSS_POWER_STATE, SCP returns the power states of every cluster. The |
| 105 | * size of response depends on the number of clusters in the system. The |
| 106 | * SCP-to-AP payload contains 2 bytes per cluster. Make sure the response is |
| 107 | * large enough to contain power states of a given cluster |
| 108 | */ |
| 109 | #define CHECK_RESPONSE(_resp, _clus) \ |
| 110 | (_resp.size >= (((_clus) + 1) * 2)) |
| 111 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 112 | typedef enum { |
| 113 | scpi_power_on = 0, |
| 114 | scpi_power_retention = 1, |
| 115 | scpi_power_off = 3, |
| 116 | } scpi_power_state_t; |
| 117 | |
| 118 | typedef enum { |
| 119 | scpi_system_shutdown = 0, |
| 120 | scpi_system_reboot = 1, |
| 121 | scpi_system_reset = 2 |
| 122 | } scpi_system_state_t; |
| 123 | |
| 124 | extern int scpi_wait_ready(void); |
| 125 | extern void scpi_set_css_power_state(unsigned mpidr, |
| 126 | scpi_power_state_t cpu_state, |
| 127 | scpi_power_state_t cluster_state, |
| 128 | scpi_power_state_t css_state); |
Jeenu Viswambharan | b1f6809 | 2016-08-04 12:44:52 +0100 | [diff] [blame] | 129 | int scpi_get_css_power_state(unsigned int mpidr, unsigned int *cpu_state_p, |
| 130 | unsigned int *cluster_state_p); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 131 | uint32_t scpi_sys_power_state(scpi_system_state_t system_state); |
| 132 | |
| 133 | |
| 134 | #endif /* __CSS_SCPI_H__ */ |