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git01.mediatek.com / filogic / atf / 3681ad33f2e455cedc40d5be99bc403ea7994b08 / . / include / lib / cpus / aarch32 / cortex_a15.h
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Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]1/*
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000[diff] [blame]7#ifndef CORTEX_A15_H
8#define CORTEX_A15_H
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]9
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]10#include <lib/utils_def.h>
11
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]12/*******************************************************************************
Ambroise Vincent68b38122019-03-05 09:54:21 +0000[diff] [blame]13 * Auxiliary Control Register 2 specific definitions.
14 ******************************************************************************/
15#define CORTEX_A15_ACTLR2 p15, 1, c15, c0, 4
16
17#define CORTEX_A15_ACTLR2_INV_DCC_BIT (U(1) << 0)
18
19/*******************************************************************************
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]20 * Cortex-A15 midr with version/revision set to 0
21 ******************************************************************************/
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]22#define CORTEX_A15_MIDR U(0x410FC0F0)
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]23
24/*******************************************************************************
25 * CPU Auxiliary Control register specific definitions.
26 ******************************************************************************/
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]27#define CORTEX_A15_ACTLR_INV_BTB_BIT (U(1) << 0)
28#define CORTEX_A15_ACTLR_SMP_BIT (U(1) << 6)
Etienne Carriere4ece7552017-11-05 22:56:10 +0100[diff] [blame]29
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000[diff] [blame]30#endif /* CORTEX_A15_H */