Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
dp-arm | 66abfbe | 2017-01-31 13:01:04 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __PSCI_PRIVATE_H__ |
| 32 | #define __PSCI_PRIVATE_H__ |
| 33 | |
Achin Gupta | a59caa4 | 2013-12-05 14:21:04 +0000 | [diff] [blame] | 34 | #include <arch.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 35 | #include <bakery_lock.h> |
Soby Mathew | 8595b87 | 2015-01-06 15:36:38 +0000 | [diff] [blame] | 36 | #include <bl_common.h> |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 37 | #include <cpu_data.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 38 | #include <psci.h> |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 39 | #include <spinlock.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 40 | |
Jeenu Viswambharan | 0b56d6f | 2017-01-06 14:58:11 +0000 | [diff] [blame^] | 41 | #if HW_ASSISTED_COHERENCY |
| 42 | /* |
| 43 | * On systems with hardware-assisted coherency, make PSCI cache operations NOP, |
| 44 | * as PSCI participants are cache-coherent, and there's no need for explicit |
| 45 | * cache maintenance operations or barriers to coordinate their state. |
| 46 | */ |
| 47 | #define psci_flush_dcache_range(addr, size) |
| 48 | #define psci_flush_cpu_data(member) |
| 49 | #define psci_inv_cpu_data(member) |
| 50 | |
| 51 | #define psci_dsbish() |
| 52 | #else |
| 53 | /* |
| 54 | * If not all PSCI participants are cache-coherent, perform cache maintenance |
| 55 | * and issue barriers wherever required to coordinate state. |
| 56 | */ |
| 57 | #define psci_flush_dcache_range(addr, size) flush_dcache_range(addr, size) |
| 58 | #define psci_flush_cpu_data(member) flush_cpu_data(member) |
| 59 | #define psci_inv_cpu_data(member) inv_cpu_data(member) |
| 60 | |
| 61 | #define psci_dsbish() dsbish() |
| 62 | #endif |
| 63 | |
Soby Mathew | 523d633 | 2015-01-08 18:02:19 +0000 | [diff] [blame] | 64 | /* |
| 65 | * The following helper macros abstract the interface to the Bakery |
| 66 | * Lock API. |
| 67 | */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 68 | #define psci_lock_init(non_cpu_pd_node, idx) \ |
| 69 | ((non_cpu_pd_node)[(idx)].lock_index = (idx)) |
| 70 | #define psci_lock_get(non_cpu_pd_node) \ |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 71 | bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index]) |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 72 | #define psci_lock_release(non_cpu_pd_node) \ |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 73 | bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index]) |
Andrew Thoelke | 56f4470 | 2014-06-20 00:36:14 +0100 | [diff] [blame] | 74 | |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 75 | /* |
| 76 | * The PSCI capability which are provided by the generic code but does not |
| 77 | * depend on the platform or spd capabilities. |
| 78 | */ |
| 79 | #define PSCI_GENERIC_CAP \ |
| 80 | (define_psci_cap(PSCI_VERSION) | \ |
| 81 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 82 | define_psci_cap(PSCI_FEATURES)) |
| 83 | |
| 84 | /* |
| 85 | * The PSCI capabilities mask for 64 bit functions. |
| 86 | */ |
| 87 | #define PSCI_CAP_64BIT_MASK \ |
| 88 | (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \ |
| 89 | define_psci_cap(PSCI_CPU_ON_AARCH64) | \ |
| 90 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 91 | define_psci_cap(PSCI_MIG_AARCH64) | \ |
Soby Mathew | 9616838 | 2014-12-17 14:47:57 +0000 | [diff] [blame] | 92 | define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \ |
Jeenu Viswambharan | 7f03e9d9 | 2016-08-03 15:54:50 +0100 | [diff] [blame] | 93 | define_psci_cap(PSCI_NODE_HW_STATE_AARCH64) | \ |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 94 | define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \ |
| 95 | define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \ |
| 96 | define_psci_cap(PSCI_STAT_COUNT_AARCH64)) |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 97 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 98 | /* |
| 99 | * Helper macros to get/set the fields of PSCI per-cpu data. |
| 100 | */ |
| 101 | #define psci_set_aff_info_state(aff_state) \ |
| 102 | set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state) |
| 103 | #define psci_get_aff_info_state() \ |
| 104 | get_cpu_data(psci_svc_cpu_data.aff_info_state) |
| 105 | #define psci_get_aff_info_state_by_idx(idx) \ |
| 106 | get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state) |
Soby Mathew | ca37050 | 2016-01-26 11:47:53 +0000 | [diff] [blame] | 107 | #define psci_set_aff_info_state_by_idx(idx, aff_state) \ |
| 108 | set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\ |
| 109 | aff_state) |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 110 | #define psci_get_suspend_pwrlvl() \ |
| 111 | get_cpu_data(psci_svc_cpu_data.target_pwrlvl) |
| 112 | #define psci_set_suspend_pwrlvl(target_lvl) \ |
| 113 | set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl) |
| 114 | #define psci_set_cpu_local_state(state) \ |
| 115 | set_cpu_data(psci_svc_cpu_data.local_state, state) |
| 116 | #define psci_get_cpu_local_state() \ |
| 117 | get_cpu_data(psci_svc_cpu_data.local_state) |
| 118 | #define psci_get_cpu_local_state_by_idx(idx) \ |
| 119 | get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state) |
| 120 | |
| 121 | /* |
| 122 | * Helper macros for the CPU level spinlocks |
| 123 | */ |
| 124 | #define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock) |
| 125 | #define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock) |
| 126 | |
| 127 | /* Helper macro to identify a CPU standby request in PSCI Suspend call */ |
| 128 | #define is_cpu_standby_req(is_power_down_state, retn_lvl) \ |
| 129 | (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0) |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 130 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 131 | /******************************************************************************* |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 132 | * The following two data structures implement the power domain tree. The tree |
| 133 | * is used to track the state of all the nodes i.e. power domain instances |
| 134 | * described by the platform. The tree consists of nodes that describe CPU power |
| 135 | * domains i.e. leaf nodes and all other power domains which are parents of a |
| 136 | * CPU power domain i.e. non-leaf nodes. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 137 | ******************************************************************************/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 138 | typedef struct non_cpu_pwr_domain_node { |
| 139 | /* |
| 140 | * Index of the first CPU power domain node level 0 which has this node |
| 141 | * as its parent. |
| 142 | */ |
| 143 | unsigned int cpu_start_idx; |
| 144 | |
| 145 | /* |
| 146 | * Number of CPU power domains which are siblings of the domain indexed |
| 147 | * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx |
| 148 | * -> cpu_start_idx + ncpus' have this node as their parent. |
| 149 | */ |
| 150 | unsigned int ncpus; |
| 151 | |
| 152 | /* |
| 153 | * Index of the parent power domain node. |
| 154 | * TODO: Figure out whether to whether using pointer is more efficient. |
| 155 | */ |
| 156 | unsigned int parent_node; |
| 157 | |
| 158 | plat_local_state_t local_state; |
| 159 | |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 160 | unsigned char level; |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 161 | |
| 162 | /* For indexing the psci_lock array*/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 163 | unsigned char lock_index; |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 164 | } non_cpu_pd_node_t; |
| 165 | |
| 166 | typedef struct cpu_pwr_domain_node { |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 167 | u_register_t mpidr; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 168 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 169 | /* |
| 170 | * Index of the parent power domain node. |
| 171 | * TODO: Figure out whether to whether using pointer is more efficient. |
| 172 | */ |
| 173 | unsigned int parent_node; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 174 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 175 | /* |
| 176 | * A CPU power domain does not require state coordination like its |
| 177 | * parent power domains. Hence this node does not include a bakery |
| 178 | * lock. A spinlock is required by the CPU_ON handler to prevent a race |
| 179 | * when multiple CPUs try to turn ON the same target CPU. |
| 180 | */ |
| 181 | spinlock_t cpu_lock; |
| 182 | } cpu_pd_node_t; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 183 | |
| 184 | /******************************************************************************* |
| 185 | * Data prototypes |
| 186 | ******************************************************************************/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 187 | extern const plat_psci_ops_t *psci_plat_pm_ops; |
| 188 | extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS]; |
| 189 | extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT]; |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 190 | extern unsigned int psci_caps; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 191 | |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 192 | /* One bakery lock is required for each non-cpu power domain */ |
| 193 | DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]); |
| 194 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 195 | /******************************************************************************* |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 196 | * SPD's power management hooks registered with PSCI |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 197 | ******************************************************************************/ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 198 | extern const spd_pm_ops_t *psci_spd_pm; |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 199 | |
| 200 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 201 | * Function prototypes |
| 202 | ******************************************************************************/ |
| 203 | /* Private exported functions from psci_common.c */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 204 | int psci_validate_power_state(unsigned int power_state, |
| 205 | psci_power_state_t *state_info); |
| 206 | void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 207 | int psci_validate_mpidr(u_register_t mpidr); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 208 | void psci_init_req_local_pwr_states(void); |
Achin Gupta | 9b2bf25 | 2016-06-28 16:46:15 +0100 | [diff] [blame] | 209 | void psci_get_target_local_pwr_states(unsigned int end_pwrlvl, |
| 210 | psci_power_state_t *target_state); |
Soby Mathew | f1f97a1 | 2015-07-15 12:13:26 +0100 | [diff] [blame] | 211 | int psci_validate_entry_point(entry_point_info_t *ep, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 212 | uintptr_t entrypoint, u_register_t context_id); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 213 | void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 214 | unsigned int end_lvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 215 | unsigned int node_index[]); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 216 | void psci_do_state_coordination(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 217 | psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 218 | void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 219 | unsigned int cpu_idx); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 220 | void psci_release_pwr_domain_locks(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 221 | unsigned int cpu_idx); |
| 222 | int psci_validate_suspend_req(const psci_power_state_t *state_info, |
| 223 | unsigned int is_power_down_state_req); |
| 224 | unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info); |
| 225 | unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 226 | void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 227 | void psci_print_power_domain_map(void); |
Soby Mathew | 9616838 | 2014-12-17 14:47:57 +0000 | [diff] [blame] | 228 | unsigned int psci_is_last_on_cpu(void); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 229 | int psci_spd_migrate_info(u_register_t *mpidr); |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 230 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 231 | /* Private exported functions from psci_on.c */ |
Soby Mathew | a0fedc4 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 232 | int psci_cpu_on_start(u_register_t target_cpu, |
Sandrine Bailleux | 7497bff | 2016-04-25 09:28:43 +0100 | [diff] [blame] | 233 | entry_point_info_t *ep); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 234 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 235 | void psci_cpu_on_finish(unsigned int cpu_idx, |
| 236 | psci_power_state_t *state_info); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 237 | |
Sandrine Bailleux | f4119ec | 2015-12-17 13:58:58 +0000 | [diff] [blame] | 238 | /* Private exported functions from psci_off.c */ |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 239 | int psci_do_cpu_off(unsigned int end_pwrlvl); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 240 | |
Sandrine Bailleux | f4119ec | 2015-12-17 13:58:58 +0000 | [diff] [blame] | 241 | /* Private exported functions from psci_suspend.c */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 242 | void psci_cpu_suspend_start(entry_point_info_t *ep, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 243 | unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 244 | psci_power_state_t *state_info, |
| 245 | unsigned int is_power_down_state_req); |
Soby Mathew | 8595b87 | 2015-01-06 15:36:38 +0000 | [diff] [blame] | 246 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 247 | void psci_cpu_suspend_finish(unsigned int cpu_idx, |
| 248 | psci_power_state_t *state_info); |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 249 | |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 250 | /* Private exported functions from psci_helpers.S */ |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 251 | void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level); |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 252 | void psci_do_pwrup_cache_maintenance(void); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 253 | |
Juan Castillo | 4dc4a47 | 2014-08-12 11:17:06 +0100 | [diff] [blame] | 254 | /* Private exported functions from psci_system_off.c */ |
| 255 | void __dead2 psci_system_off(void); |
| 256 | void __dead2 psci_system_reset(void); |
| 257 | |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 258 | /* Private exported functions from psci_stat.c */ |
| 259 | void psci_stats_update_pwr_down(unsigned int end_pwrlvl, |
| 260 | const psci_power_state_t *state_info); |
| 261 | void psci_stats_update_pwr_up(unsigned int end_pwrlvl, |
dp-arm | 66abfbe | 2017-01-31 13:01:04 +0000 | [diff] [blame] | 262 | const psci_power_state_t *state_info); |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 263 | u_register_t psci_stat_residency(u_register_t target_cpu, |
| 264 | unsigned int power_state); |
| 265 | u_register_t psci_stat_count(u_register_t target_cpu, |
| 266 | unsigned int power_state); |
| 267 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 268 | #endif /* __PSCI_PRIVATE_H__ */ |