blob: edd045c0f7b4de5d2e97e4b022a01b789bf9878e [file] [log] [blame]
developer550bf5e2016-07-11 16:05:23 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __MT_CPUXGPT_H__
32#define __MT_CPUXGPT_H__
33
34/* REG */
35#define INDEX_CTL_REG 0x000
36#define INDEX_STA_REG 0x004
37#define INDEX_CNT_L_INIT 0x008
38#define INDEX_CNT_H_INIT 0x00C
39
40/* CTL_REG SET */
41#define EN_CPUXGPT 0x01
42#define EN_AHLT_DEBUG 0x02
43#define CLK_DIV1 (0x1 << 8)
44#define CLK_DIV2 (0x2 << 8)
45#define CLK_DIV4 (0x4 << 8)
46#define CLK_DIV_MASK (~(0x7<<8))
47
48void generic_timer_backup(void);
49void sched_clock_init(uint64_t normal_base, uint64_t atf_base);
50uint64_t sched_clock(void);
51
52#endif /* __MT_CPUXGPT_H__ */