| Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <gic_v2.h> |
| 32 | #include <platform.h> |
| 33 | |
| 34 | .section .rodata.gic_reg_name, "aS" |
| 35 | gic_regs: .asciz "gic_iar", "gic_ctlr", "" |
| 36 | |
| 37 | /* Currently we have only 2 GIC registers to report */ |
| 38 | #define GIC_REG_SIZE (2 * 8) |
| 39 | /* --------------------------------------------- |
| 40 | * The below macro prints out relevant GIC |
| 41 | * registers whenever an unhandled exception is |
| 42 | * taken in BL31. |
| 43 | * --------------------------------------------- |
| 44 | */ |
| 45 | .macro plat_print_gic_regs |
| 46 | mov x0, #CONFIG_GICC_ADDR |
| 47 | bl platform_get_cfgvar |
| 48 | /* gic base address is now in x0 */ |
| 49 | ldr w1, [x0, #GICC_IAR] |
| 50 | ldr w2, [x0, #GICD_CTLR] |
| 51 | sub sp, sp, #GIC_REG_SIZE |
| 52 | stp x1, x2, [sp] /* we store the gic registers as 64 bit */ |
| 53 | adr x0, gic_regs |
| 54 | mov x1, sp |
| 55 | bl print_string_value |
| 56 | add sp, sp, #GIC_REG_SIZE |
| 57 | .endm |