blob: 925e93e379fff33026df925f785baffd5200d03f [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Andrew Thoelke38bde412014-03-18 13:46:55 +000032#include <asm_macros.S>
Achin Gupta4f6ad662013-10-25 09:08:21 +010033
Achin Gupta4f6ad662013-10-25 09:08:21 +010034 .globl read_vbar_el1
35 .globl read_vbar_el2
36 .globl read_vbar_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010037 .globl write_vbar_el1
38 .globl write_vbar_el2
39 .globl write_vbar_el3
40
Achin Gupta4f6ad662013-10-25 09:08:21 +010041 .globl read_sctlr_el1
42 .globl read_sctlr_el2
43 .globl read_sctlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010044 .globl write_sctlr_el1
45 .globl write_sctlr_el2
46 .globl write_sctlr_el3
47
Achin Gupta4f6ad662013-10-25 09:08:21 +010048 .globl read_actlr_el1
49 .globl read_actlr_el2
50 .globl read_actlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010051 .globl write_actlr_el1
52 .globl write_actlr_el2
53 .globl write_actlr_el3
54
Achin Gupta4f6ad662013-10-25 09:08:21 +010055 .globl read_esr_el1
56 .globl read_esr_el2
57 .globl read_esr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010058 .globl write_esr_el1
59 .globl write_esr_el2
60 .globl write_esr_el3
61
Achin Gupta4f6ad662013-10-25 09:08:21 +010062 .globl read_afsr0_el1
63 .globl read_afsr0_el2
64 .globl read_afsr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 .globl write_afsr0_el1
66 .globl write_afsr0_el2
67 .globl write_afsr0_el3
68
Achin Gupta4f6ad662013-10-25 09:08:21 +010069 .globl read_afsr1_el1
70 .globl read_afsr1_el2
71 .globl read_afsr1_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010072 .globl write_afsr1_el1
73 .globl write_afsr1_el2
74 .globl write_afsr1_el3
75
Achin Gupta4f6ad662013-10-25 09:08:21 +010076 .globl read_far_el1
77 .globl read_far_el2
78 .globl read_far_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010079 .globl write_far_el1
80 .globl write_far_el2
81 .globl write_far_el3
82
Achin Gupta4f6ad662013-10-25 09:08:21 +010083 .globl read_mair_el1
84 .globl read_mair_el2
85 .globl read_mair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010086 .globl write_mair_el1
87 .globl write_mair_el2
88 .globl write_mair_el3
89
Achin Gupta4f6ad662013-10-25 09:08:21 +010090 .globl read_amair_el1
91 .globl read_amair_el2
92 .globl read_amair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +010093 .globl write_amair_el1
94 .globl write_amair_el2
95 .globl write_amair_el3
96
Achin Gupta4f6ad662013-10-25 09:08:21 +010097 .globl read_rvbar_el1
98 .globl read_rvbar_el2
99 .globl read_rvbar_el3
100
Achin Gupta4f6ad662013-10-25 09:08:21 +0100101 .globl read_rmr_el1
102 .globl read_rmr_el2
103 .globl read_rmr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100104 .globl write_rmr_el1
105 .globl write_rmr_el2
106 .globl write_rmr_el3
107
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108 .globl read_tcr_el1
109 .globl read_tcr_el2
110 .globl read_tcr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100111 .globl write_tcr_el1
112 .globl write_tcr_el2
113 .globl write_tcr_el3
114
Achin Gupta4f6ad662013-10-25 09:08:21 +0100115 .globl read_cptr_el2
116 .globl read_cptr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100117 .globl write_cptr_el2
118 .globl write_cptr_el3
119
Achin Gupta4f6ad662013-10-25 09:08:21 +0100120 .globl read_ttbr0_el1
121 .globl read_ttbr0_el2
122 .globl read_ttbr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100123 .globl write_ttbr0_el1
124 .globl write_ttbr0_el2
125 .globl write_ttbr0_el3
126
Achin Gupta4f6ad662013-10-25 09:08:21 +0100127 .globl read_ttbr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100128 .globl write_ttbr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100129
130 .globl read_cpacr
131 .globl write_cpacr
132
133 .globl read_cntfrq
134 .globl write_cntfrq
135
136 .globl read_cpuectlr
137 .globl write_cpuectlr
138
139 .globl read_cnthctl_el2
140 .globl write_cnthctl_el2
141
142 .globl read_cntfrq_el0
143 .globl write_cntfrq_el0
144
Achin Gupta405406d2014-05-09 12:00:17 +0100145 .globl read_cntps_ctl_el1
146 .globl write_cntps_ctl_el1
147
148 .globl read_cntps_cval_el1
149 .globl write_cntps_cval_el1
150
151 .globl read_cntps_tval_el1
152 .globl write_cntps_tval_el1
153
Achin Gupta4f6ad662013-10-25 09:08:21 +0100154 .globl read_scr
155 .globl write_scr
156
157 .globl read_hcr
158 .globl write_hcr
159
160 .globl read_midr
161 .globl read_mpidr
162
Achin Gupta405406d2014-05-09 12:00:17 +0100163 .globl read_cntpct_el0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100164 .globl read_current_el
165 .globl read_id_pfr1_el1
166 .globl read_id_aa64pfr0_el1
167
Soby Mathew5e5c2072014-04-07 15:28:55 +0100168 .globl write_tpidr_el3
169 .globl read_tpidr_el3
170
Achin Gupta4f6ad662013-10-25 09:08:21 +0100171#if SUPPORT_VFP
172 .globl enable_vfp
Achin Gupta4f6ad662013-10-25 09:08:21 +0100173#endif
174
175
Andrew Thoelke38bde412014-03-18 13:46:55 +0000176func read_current_el
Achin Gupta4f6ad662013-10-25 09:08:21 +0100177 mrs x0, CurrentEl
178 ret
179
180
Andrew Thoelke38bde412014-03-18 13:46:55 +0000181func read_id_pfr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182 mrs x0, id_pfr1_el1
183 ret
184
185
Andrew Thoelke38bde412014-03-18 13:46:55 +0000186func read_id_aa64pfr0_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100187 mrs x0, id_aa64pfr0_el1
188 ret
189
190
191 /* -----------------------------------------------------
192 * VBAR accessors
193 * -----------------------------------------------------
194 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000195func read_vbar_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100196 mrs x0, vbar_el1
197 ret
198
199
Andrew Thoelke38bde412014-03-18 13:46:55 +0000200func read_vbar_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100201 mrs x0, vbar_el2
202 ret
203
204
Andrew Thoelke38bde412014-03-18 13:46:55 +0000205func read_vbar_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100206 mrs x0, vbar_el3
207 ret
208
209
Andrew Thoelke38bde412014-03-18 13:46:55 +0000210func write_vbar_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211 msr vbar_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100212 ret
213
214
Andrew Thoelke38bde412014-03-18 13:46:55 +0000215func write_vbar_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100216 msr vbar_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100217 ret
218
219
Andrew Thoelke38bde412014-03-18 13:46:55 +0000220func write_vbar_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100221 msr vbar_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100222 ret
223
224
225 /* -----------------------------------------------------
226 * AFSR0 accessors
227 * -----------------------------------------------------
228 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000229func read_afsr0_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100230 mrs x0, afsr0_el1
231 ret
232
233
Andrew Thoelke38bde412014-03-18 13:46:55 +0000234func read_afsr0_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100235 mrs x0, afsr0_el2
236 ret
237
238
Andrew Thoelke38bde412014-03-18 13:46:55 +0000239func read_afsr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100240 mrs x0, afsr0_el3
241 ret
242
243
Andrew Thoelke38bde412014-03-18 13:46:55 +0000244func write_afsr0_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100245 msr afsr0_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100246 ret
247
248
Andrew Thoelke38bde412014-03-18 13:46:55 +0000249func write_afsr0_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100250 msr afsr0_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100251 ret
252
253
Andrew Thoelke38bde412014-03-18 13:46:55 +0000254func write_afsr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255 msr afsr0_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100256 ret
257
258
259 /* -----------------------------------------------------
260 * FAR accessors
261 * -----------------------------------------------------
262 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000263func read_far_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100264 mrs x0, far_el1
265 ret
266
267
Andrew Thoelke38bde412014-03-18 13:46:55 +0000268func read_far_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100269 mrs x0, far_el2
270 ret
271
272
Andrew Thoelke38bde412014-03-18 13:46:55 +0000273func read_far_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100274 mrs x0, far_el3
275 ret
276
277
Andrew Thoelke38bde412014-03-18 13:46:55 +0000278func write_far_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100279 msr far_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100280 ret
281
282
Andrew Thoelke38bde412014-03-18 13:46:55 +0000283func write_far_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100284 msr far_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100285 ret
286
287
Andrew Thoelke38bde412014-03-18 13:46:55 +0000288func write_far_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100289 msr far_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100290 ret
291
292
293 /* -----------------------------------------------------
294 * MAIR accessors
295 * -----------------------------------------------------
296 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000297func read_mair_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100298 mrs x0, mair_el1
299 ret
300
301
Andrew Thoelke38bde412014-03-18 13:46:55 +0000302func read_mair_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100303 mrs x0, mair_el2
304 ret
305
306
Andrew Thoelke38bde412014-03-18 13:46:55 +0000307func read_mair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100308 mrs x0, mair_el3
309 ret
310
311
Andrew Thoelke38bde412014-03-18 13:46:55 +0000312func write_mair_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100313 msr mair_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100314 ret
315
316
Andrew Thoelke38bde412014-03-18 13:46:55 +0000317func write_mair_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100318 msr mair_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100319 ret
320
321
Andrew Thoelke38bde412014-03-18 13:46:55 +0000322func write_mair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100323 msr mair_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100324 ret
325
326
327 /* -----------------------------------------------------
328 * AMAIR accessors
329 * -----------------------------------------------------
330 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000331func read_amair_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100332 mrs x0, amair_el1
333 ret
334
335
Andrew Thoelke38bde412014-03-18 13:46:55 +0000336func read_amair_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100337 mrs x0, amair_el2
338 ret
339
340
Andrew Thoelke38bde412014-03-18 13:46:55 +0000341func read_amair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100342 mrs x0, amair_el3
343 ret
344
345
Andrew Thoelke38bde412014-03-18 13:46:55 +0000346func write_amair_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100347 msr amair_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100348 ret
349
350
Andrew Thoelke38bde412014-03-18 13:46:55 +0000351func write_amair_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100352 msr amair_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100353 ret
354
355
Andrew Thoelke38bde412014-03-18 13:46:55 +0000356func write_amair_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100357 msr amair_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100358 ret
359
360
361 /* -----------------------------------------------------
362 * RVBAR accessors
363 * -----------------------------------------------------
364 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000365func read_rvbar_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100366 mrs x0, rvbar_el1
367 ret
368
369
Andrew Thoelke38bde412014-03-18 13:46:55 +0000370func read_rvbar_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100371 mrs x0, rvbar_el2
372 ret
373
374
Andrew Thoelke38bde412014-03-18 13:46:55 +0000375func read_rvbar_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100376 mrs x0, rvbar_el3
377 ret
378
379
380 /* -----------------------------------------------------
381 * RMR accessors
382 * -----------------------------------------------------
383 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000384func read_rmr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100385 mrs x0, rmr_el1
386 ret
387
388
Andrew Thoelke38bde412014-03-18 13:46:55 +0000389func read_rmr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100390 mrs x0, rmr_el2
391 ret
392
393
Andrew Thoelke38bde412014-03-18 13:46:55 +0000394func read_rmr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100395 mrs x0, rmr_el3
396 ret
397
398
Andrew Thoelke38bde412014-03-18 13:46:55 +0000399func write_rmr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100400 msr rmr_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100401 ret
402
403
Andrew Thoelke38bde412014-03-18 13:46:55 +0000404func write_rmr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100405 msr rmr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100406 ret
407
408
Andrew Thoelke38bde412014-03-18 13:46:55 +0000409func write_rmr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100410 msr rmr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100411 ret
412
413
Achin Gupta4f6ad662013-10-25 09:08:21 +0100414 /* -----------------------------------------------------
415 * AFSR1 accessors
416 * -----------------------------------------------------
417 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000418func read_afsr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100419 mrs x0, afsr1_el1
420 ret
421
422
Andrew Thoelke38bde412014-03-18 13:46:55 +0000423func read_afsr1_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100424 mrs x0, afsr1_el2
425 ret
426
427
Andrew Thoelke38bde412014-03-18 13:46:55 +0000428func read_afsr1_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100429 mrs x0, afsr1_el3
430 ret
431
432
Andrew Thoelke38bde412014-03-18 13:46:55 +0000433func write_afsr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100434 msr afsr1_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100435 ret
436
437
Andrew Thoelke38bde412014-03-18 13:46:55 +0000438func write_afsr1_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100439 msr afsr1_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100440 ret
441
442
Andrew Thoelke38bde412014-03-18 13:46:55 +0000443func write_afsr1_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100444 msr afsr1_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100445 ret
446
447
448 /* -----------------------------------------------------
449 * SCTLR accessors
450 * -----------------------------------------------------
451 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000452func read_sctlr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100453 mrs x0, sctlr_el1
454 ret
455
456
Andrew Thoelke38bde412014-03-18 13:46:55 +0000457func read_sctlr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100458 mrs x0, sctlr_el2
459 ret
460
461
Andrew Thoelke38bde412014-03-18 13:46:55 +0000462func read_sctlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100463 mrs x0, sctlr_el3
464 ret
465
466
Andrew Thoelke38bde412014-03-18 13:46:55 +0000467func write_sctlr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100468 msr sctlr_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100469 ret
470
471
Andrew Thoelke38bde412014-03-18 13:46:55 +0000472func write_sctlr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100473 msr sctlr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100474 ret
475
476
Andrew Thoelke38bde412014-03-18 13:46:55 +0000477func write_sctlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100478 msr sctlr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100479 ret
480
481
482 /* -----------------------------------------------------
483 * ACTLR accessors
484 * -----------------------------------------------------
485 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000486func read_actlr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100487 mrs x0, actlr_el1
488 ret
489
490
Andrew Thoelke38bde412014-03-18 13:46:55 +0000491func read_actlr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100492 mrs x0, actlr_el2
493 ret
494
495
Andrew Thoelke38bde412014-03-18 13:46:55 +0000496func read_actlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100497 mrs x0, actlr_el3
498 ret
499
500
Andrew Thoelke38bde412014-03-18 13:46:55 +0000501func write_actlr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100502 msr actlr_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100503 ret
504
505
Andrew Thoelke38bde412014-03-18 13:46:55 +0000506func write_actlr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100507 msr actlr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100508 ret
509
510
Andrew Thoelke38bde412014-03-18 13:46:55 +0000511func write_actlr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100512 msr actlr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100513 ret
514
515
516 /* -----------------------------------------------------
517 * ESR accessors
518 * -----------------------------------------------------
519 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000520func read_esr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100521 mrs x0, esr_el1
522 ret
523
524
Andrew Thoelke38bde412014-03-18 13:46:55 +0000525func read_esr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100526 mrs x0, esr_el2
527 ret
528
529
Andrew Thoelke38bde412014-03-18 13:46:55 +0000530func read_esr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100531 mrs x0, esr_el3
532 ret
533
534
Andrew Thoelke38bde412014-03-18 13:46:55 +0000535func write_esr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100536 msr esr_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100537 ret
538
539
Andrew Thoelke38bde412014-03-18 13:46:55 +0000540func write_esr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100541 msr esr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100542 ret
543
544
Andrew Thoelke38bde412014-03-18 13:46:55 +0000545func write_esr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100546 msr esr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100547 ret
548
549
550 /* -----------------------------------------------------
551 * TCR accessors
552 * -----------------------------------------------------
553 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000554func read_tcr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100555 mrs x0, tcr_el1
556 ret
557
558
Andrew Thoelke38bde412014-03-18 13:46:55 +0000559func read_tcr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100560 mrs x0, tcr_el2
561 ret
562
563
Andrew Thoelke38bde412014-03-18 13:46:55 +0000564func read_tcr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100565 mrs x0, tcr_el3
566 ret
567
Achin Gupta4f6ad662013-10-25 09:08:21 +0100568
Andrew Thoelke38bde412014-03-18 13:46:55 +0000569func write_tcr_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100570 msr tcr_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100571 ret
572
573
Andrew Thoelke38bde412014-03-18 13:46:55 +0000574func write_tcr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100575 msr tcr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100576 ret
577
578
Andrew Thoelke38bde412014-03-18 13:46:55 +0000579func write_tcr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100580 msr tcr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100581 ret
582
583
584 /* -----------------------------------------------------
585 * CPTR accessors
586 * -----------------------------------------------------
587 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000588func read_cptr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100589 mrs x0, cptr_el2
590 ret
591
592
Andrew Thoelke38bde412014-03-18 13:46:55 +0000593func read_cptr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100594 mrs x0, cptr_el3
595 ret
596
Achin Gupta4f6ad662013-10-25 09:08:21 +0100597
Andrew Thoelke38bde412014-03-18 13:46:55 +0000598func write_cptr_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100599 msr cptr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100600 ret
601
602
Andrew Thoelke38bde412014-03-18 13:46:55 +0000603func write_cptr_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100604 msr cptr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100605 ret
606
607
608 /* -----------------------------------------------------
609 * TTBR0 accessors
610 * -----------------------------------------------------
611 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000612func read_ttbr0_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100613 mrs x0, ttbr0_el1
614 ret
615
616
Andrew Thoelke38bde412014-03-18 13:46:55 +0000617func read_ttbr0_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100618 mrs x0, ttbr0_el2
619 ret
620
621
Andrew Thoelke38bde412014-03-18 13:46:55 +0000622func read_ttbr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100623 mrs x0, ttbr0_el3
624 ret
625
626
Andrew Thoelke38bde412014-03-18 13:46:55 +0000627func write_ttbr0_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100628 msr ttbr0_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100629 ret
630
631
Andrew Thoelke38bde412014-03-18 13:46:55 +0000632func write_ttbr0_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100633 msr ttbr0_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100634 ret
635
636
Andrew Thoelke38bde412014-03-18 13:46:55 +0000637func write_ttbr0_el3
Achin Gupta4f6ad662013-10-25 09:08:21 +0100638 msr ttbr0_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100639 ret
640
641
642 /* -----------------------------------------------------
643 * TTBR1 accessors
644 * -----------------------------------------------------
645 */
Andrew Thoelke38bde412014-03-18 13:46:55 +0000646func read_ttbr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100647 mrs x0, ttbr1_el1
648 ret
649
650
Andrew Thoelke38bde412014-03-18 13:46:55 +0000651func write_ttbr1_el1
Achin Gupta4f6ad662013-10-25 09:08:21 +0100652 msr ttbr1_el1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100653 ret
654
655
Andrew Thoelke38bde412014-03-18 13:46:55 +0000656func read_hcr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100657 mrs x0, hcr_el2
658 ret
659
660
Andrew Thoelke38bde412014-03-18 13:46:55 +0000661func write_hcr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100662 msr hcr_el2, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100663 ret
664
665
Andrew Thoelke38bde412014-03-18 13:46:55 +0000666func read_cpacr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100667 mrs x0, cpacr_el1
668 ret
669
670
Andrew Thoelke38bde412014-03-18 13:46:55 +0000671func write_cpacr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100672 msr cpacr_el1, x0
673 ret
674
675
Andrew Thoelke38bde412014-03-18 13:46:55 +0000676func read_cntfrq_el0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100677 mrs x0, cntfrq_el0
678 ret
679
680
Andrew Thoelke38bde412014-03-18 13:46:55 +0000681func write_cntfrq_el0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100682 msr cntfrq_el0, x0
683 ret
684
Achin Gupta405406d2014-05-09 12:00:17 +0100685func read_cntps_ctl_el1
686 mrs x0, cntps_ctl_el1
687 ret
688
689func write_cntps_ctl_el1
690 msr cntps_ctl_el1, x0
691 ret
692
693func read_cntps_cval_el1
694 mrs x0, cntps_cval_el1
695 ret
696
697func write_cntps_cval_el1
698 msr cntps_cval_el1, x0
699 ret
700
701func read_cntps_tval_el1
702 mrs x0, cntps_tval_el1
703 ret
704
705func write_cntps_tval_el1
706 msr cntps_tval_el1, x0
707 ret
708
709func read_cntpct_el0
710 mrs x0, cntpct_el0
711 ret
Achin Gupta4f6ad662013-10-25 09:08:21 +0100712
Andrew Thoelke38bde412014-03-18 13:46:55 +0000713func read_cpuectlr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100714 mrs x0, CPUECTLR_EL1
715 ret
716
717
Andrew Thoelke38bde412014-03-18 13:46:55 +0000718func write_cpuectlr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100719 msr CPUECTLR_EL1, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100720 ret
721
722
Andrew Thoelke38bde412014-03-18 13:46:55 +0000723func read_cnthctl_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100724 mrs x0, cnthctl_el2
725 ret
726
727
Andrew Thoelke38bde412014-03-18 13:46:55 +0000728func write_cnthctl_el2
Achin Gupta4f6ad662013-10-25 09:08:21 +0100729 msr cnthctl_el2, x0
730 ret
731
732
Andrew Thoelke38bde412014-03-18 13:46:55 +0000733func read_cntfrq
Achin Gupta4f6ad662013-10-25 09:08:21 +0100734 mrs x0, cntfrq_el0
735 ret
736
737
Andrew Thoelke38bde412014-03-18 13:46:55 +0000738func write_cntfrq
Achin Gupta4f6ad662013-10-25 09:08:21 +0100739 msr cntfrq_el0, x0
740 ret
741
742
Andrew Thoelke38bde412014-03-18 13:46:55 +0000743func write_scr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100744 msr scr_el3, x0
Achin Gupta4f6ad662013-10-25 09:08:21 +0100745 ret
746
747
Andrew Thoelke38bde412014-03-18 13:46:55 +0000748func read_scr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100749 mrs x0, scr_el3
750 ret
751
752
Andrew Thoelke38bde412014-03-18 13:46:55 +0000753func read_midr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100754 mrs x0, midr_el1
755 ret
756
757
Andrew Thoelke38bde412014-03-18 13:46:55 +0000758func read_mpidr
Achin Gupta4f6ad662013-10-25 09:08:21 +0100759 mrs x0, mpidr_el1
760 ret
761
Soby Mathew5e5c2072014-04-07 15:28:55 +0100762func write_tpidr_el3
763 msr tpidr_el3, x0
764 ret
765
766func read_tpidr_el3
767 mrs x0, tpidr_el3
768 ret
Achin Gupta4f6ad662013-10-25 09:08:21 +0100769
770#if SUPPORT_VFP
Andrew Thoelke38bde412014-03-18 13:46:55 +0000771func enable_vfp
Achin Gupta4f6ad662013-10-25 09:08:21 +0100772 mrs x0, cpacr_el1
773 orr x0, x0, #CPACR_VFP_BITS
774 msr cpacr_el1, x0
775 mrs x0, cptr_el3
776 mov x1, #AARCH64_CPTR_TFP
777 bic x0, x0, x1
778 msr cptr_el3, x0
Andrew Thoelke42e75a72014-04-28 12:28:39 +0100779 isb
Achin Gupta4f6ad662013-10-25 09:08:21 +0100780 ret
781
Achin Gupta4f6ad662013-10-25 09:08:21 +0100782#endif