Sumit Garg | 4d4df11 | 2018-06-15 14:43:35 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __SQ_COMMON_H__ |
| 8 | #define __SQ_COMMON_H__ |
| 9 | |
| 10 | #include <sys/types.h> |
Sumit Garg | 470255b | 2018-06-15 15:10:16 +0530 | [diff] [blame] | 11 | #include <xlat_tables_v2.h> |
Sumit Garg | 4d4df11 | 2018-06-15 14:43:35 +0530 | [diff] [blame] | 12 | |
Ard Biesheuvel | 6fc122f | 2018-06-15 15:25:42 +0530 | [diff] [blame] | 13 | struct draminfo { |
| 14 | uint32_t num_regions; |
| 15 | uint32_t reserved; |
| 16 | uint64_t base1; |
| 17 | uint64_t size1; |
| 18 | uint64_t base2; |
| 19 | uint64_t size2; |
| 20 | uint64_t base3; |
| 21 | uint64_t size3; |
| 22 | }; |
| 23 | |
| 24 | uint32_t scpi_get_draminfo(struct draminfo *info); |
| 25 | |
Sumit Garg | fe71761 | 2018-06-15 15:17:10 +0530 | [diff] [blame] | 26 | void plat_sq_pwrc_setup(void); |
| 27 | |
Sumit Garg | bda9d3c | 2018-06-15 14:50:19 +0530 | [diff] [blame] | 28 | void plat_sq_interconnect_init(void); |
| 29 | void plat_sq_interconnect_enter_coherency(void); |
| 30 | void plat_sq_interconnect_exit_coherency(void); |
| 31 | |
Sumit Garg | 4d4df11 | 2018-06-15 14:43:35 +0530 | [diff] [blame] | 32 | unsigned int sq_calc_core_pos(u_register_t mpidr); |
| 33 | |
Sumit Garg | c412c2c | 2018-06-15 14:58:25 +0530 | [diff] [blame] | 34 | void sq_gic_driver_init(void); |
| 35 | void sq_gic_init(void); |
| 36 | void sq_gic_cpuif_enable(void); |
| 37 | void sq_gic_cpuif_disable(void); |
| 38 | void sq_gic_pcpu_init(void); |
| 39 | |
Sumit Garg | 470255b | 2018-06-15 15:10:16 +0530 | [diff] [blame] | 40 | void sq_mmap_setup(uintptr_t total_base, size_t total_size, |
| 41 | const struct mmap_region *mmap); |
| 42 | |
Sumit Garg | 4d4df11 | 2018-06-15 14:43:35 +0530 | [diff] [blame] | 43 | #endif /* __SQ_COMMON_H__ */ |