blob: b7efde46222b8b4cfebbc25edd0b13f67a942518 [file] [log] [blame]
Jeenu Viswambharan5c503042017-05-26 14:15:40 +01001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __SMMU_V3_H__
8#define __SMMU_V3_H__
9
10#include <stdint.h>
11
12/* SMMUv3 register offsets from device base */
13#define SMMU_S_IDR1 0x8004
14#define SMMU_S_INIT 0x803c
15
16/* SMMU_S_IDR1 register fields */
17#define SMMU_S_IDR1_SECURE_IMPL_SHIFT 31
18#define SMMU_S_IDR1_SECURE_IMPL_MASK 0x1
19
20/* SMMU_S_INIT register fields */
21#define SMMU_S_INIT_INV_ALL_MASK 0x1
22
23
24int smmuv3_init(uintptr_t smmu_base);
25
26#endif /* __SMMU_V3_H__ */