Jorge Ramirez-Ortiz | 47503d2 | 2018-09-23 09:36:52 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #define DDR_PHY_SLICE_REGSET_OFS_M3 0x0800 |
| 8 | #define DDR_PHY_ADR_V_REGSET_OFS_M3 0x0a00 |
| 9 | #define DDR_PHY_ADR_I_REGSET_OFS_M3 0x0a80 |
| 10 | #define DDR_PHY_ADR_G_REGSET_OFS_M3 0x0b80 |
| 11 | #define DDR_PI_REGSET_OFS_M3 0x0200 |
| 12 | |
| 13 | #define DDR_PHY_SLICE_REGSET_SIZE_M3 0x80 |
| 14 | #define DDR_PHY_ADR_V_REGSET_SIZE_M3 0x80 |
| 15 | #define DDR_PHY_ADR_I_REGSET_SIZE_M3 0x80 |
| 16 | #define DDR_PHY_ADR_G_REGSET_SIZE_M3 0x80 |
| 17 | #define DDR_PI_REGSET_SIZE_M3 0x100 |
| 18 | |
| 19 | #define DDR_PHY_SLICE_REGSET_NUM_M3 89 |
| 20 | #define DDR_PHY_ADR_V_REGSET_NUM_M3 37 |
| 21 | #define DDR_PHY_ADR_I_REGSET_NUM_M3 37 |
| 22 | #define DDR_PHY_ADR_G_REGSET_NUM_M3 64 |
| 23 | #define DDR_PI_REGSET_NUM_M3 202 |
| 24 | |
| 25 | static const uint32_t DDR_PHY_SLICE_REGSET_M3[DDR_PHY_SLICE_REGSET_NUM_M3] = { |
| 26 | /*0800*/ 0x76543210, |
| 27 | /*0801*/ 0x0004f008, |
| 28 | /*0802*/ 0x00000000, |
| 29 | /*0803*/ 0x00000000, |
| 30 | /*0804*/ 0x00010000, |
| 31 | /*0805*/ 0x036e6e0e, |
| 32 | /*0806*/ 0x026e6e0e, |
| 33 | /*0807*/ 0x00010300, |
| 34 | /*0808*/ 0x04000100, |
| 35 | /*0809*/ 0x00000300, |
| 36 | /*080a*/ 0x001700c0, |
| 37 | /*080b*/ 0x00b00201, |
| 38 | /*080c*/ 0x00030020, |
| 39 | /*080d*/ 0x00000000, |
| 40 | /*080e*/ 0x00000000, |
| 41 | /*080f*/ 0x00000000, |
| 42 | /*0810*/ 0x00000000, |
| 43 | /*0811*/ 0x00000000, |
| 44 | /*0812*/ 0x00000000, |
| 45 | /*0813*/ 0x00000000, |
| 46 | /*0814*/ 0x09000000, |
| 47 | /*0815*/ 0x04080000, |
| 48 | /*0816*/ 0x04080400, |
| 49 | /*0817*/ 0x00000000, |
| 50 | /*0818*/ 0x32103210, |
| 51 | /*0819*/ 0x00800708, |
| 52 | /*081a*/ 0x000f000c, |
| 53 | /*081b*/ 0x00000100, |
| 54 | /*081c*/ 0x55aa55aa, |
| 55 | /*081d*/ 0x33cc33cc, |
| 56 | /*081e*/ 0x0ff00ff0, |
| 57 | /*081f*/ 0x0f0ff0f0, |
| 58 | /*0820*/ 0x00018e38, |
| 59 | /*0821*/ 0x00000000, |
| 60 | /*0822*/ 0x00000000, |
| 61 | /*0823*/ 0x00000000, |
| 62 | /*0824*/ 0x00000000, |
| 63 | /*0825*/ 0x00000000, |
| 64 | /*0826*/ 0x00000000, |
| 65 | /*0827*/ 0x00000000, |
| 66 | /*0828*/ 0x00000000, |
| 67 | /*0829*/ 0x00000000, |
| 68 | /*082a*/ 0x00000000, |
| 69 | /*082b*/ 0x00000000, |
| 70 | /*082c*/ 0x00000000, |
| 71 | /*082d*/ 0x00000000, |
| 72 | /*082e*/ 0x00000000, |
| 73 | /*082f*/ 0x00000000, |
| 74 | /*0830*/ 0x00000000, |
| 75 | /*0831*/ 0x00000000, |
| 76 | /*0832*/ 0x00000000, |
| 77 | /*0833*/ 0x00200000, |
| 78 | /*0834*/ 0x08200820, |
| 79 | /*0835*/ 0x08200820, |
| 80 | /*0836*/ 0x08200820, |
| 81 | /*0837*/ 0x08200820, |
| 82 | /*0838*/ 0x08200820, |
| 83 | /*0839*/ 0x00000820, |
| 84 | /*083a*/ 0x03000300, |
| 85 | /*083b*/ 0x03000300, |
| 86 | /*083c*/ 0x03000300, |
| 87 | /*083d*/ 0x03000300, |
| 88 | /*083e*/ 0x00000300, |
| 89 | /*083f*/ 0x00000000, |
| 90 | /*0840*/ 0x00000000, |
| 91 | /*0841*/ 0x00000000, |
| 92 | /*0842*/ 0x00000000, |
| 93 | /*0843*/ 0x00a00000, |
| 94 | /*0844*/ 0x00a000a0, |
| 95 | /*0845*/ 0x00a000a0, |
| 96 | /*0846*/ 0x00a000a0, |
| 97 | /*0847*/ 0x00a000a0, |
| 98 | /*0848*/ 0x00a000a0, |
| 99 | /*0849*/ 0x00a000a0, |
| 100 | /*084a*/ 0x00a000a0, |
| 101 | /*084b*/ 0x00a000a0, |
| 102 | /*084c*/ 0x010900a0, |
| 103 | /*084d*/ 0x02000104, |
| 104 | /*084e*/ 0x00000000, |
| 105 | /*084f*/ 0x00010000, |
| 106 | /*0850*/ 0x00000200, |
| 107 | /*0851*/ 0x4041a141, |
| 108 | /*0852*/ 0xc00141a0, |
| 109 | /*0853*/ 0x0e0100c0, |
| 110 | /*0854*/ 0x0010000c, |
| 111 | /*0855*/ 0x0c064208, |
| 112 | /*0856*/ 0x000f0c18, |
| 113 | /*0857*/ 0x00e00140, |
| 114 | /*0858*/ 0x00000c20 |
| 115 | }; |
| 116 | |
| 117 | static const uint32_t DDR_PHY_ADR_V_REGSET_M3[DDR_PHY_ADR_V_REGSET_NUM_M3] = { |
| 118 | /*0a00*/ 0x00000000, |
| 119 | /*0a01*/ 0x00000000, |
| 120 | /*0a02*/ 0x00000000, |
| 121 | /*0a03*/ 0x00000000, |
| 122 | /*0a04*/ 0x00000000, |
| 123 | /*0a05*/ 0x00000000, |
| 124 | /*0a06*/ 0x00000002, |
| 125 | /*0a07*/ 0x00000000, |
| 126 | /*0a08*/ 0x00000000, |
| 127 | /*0a09*/ 0x00000000, |
| 128 | /*0a0a*/ 0x00400320, |
| 129 | /*0a0b*/ 0x00000040, |
| 130 | /*0a0c*/ 0x00dcba98, |
| 131 | /*0a0d*/ 0x00000000, |
| 132 | /*0a0e*/ 0x00dcba98, |
| 133 | /*0a0f*/ 0x01000000, |
| 134 | /*0a10*/ 0x00020003, |
| 135 | /*0a11*/ 0x00000000, |
| 136 | /*0a12*/ 0x00000000, |
| 137 | /*0a13*/ 0x00000000, |
| 138 | /*0a14*/ 0x0000002a, |
| 139 | /*0a15*/ 0x00000015, |
| 140 | /*0a16*/ 0x00000015, |
| 141 | /*0a17*/ 0x0000002a, |
| 142 | /*0a18*/ 0x00000033, |
| 143 | /*0a19*/ 0x0000000c, |
| 144 | /*0a1a*/ 0x0000000c, |
| 145 | /*0a1b*/ 0x00000033, |
| 146 | /*0a1c*/ 0x0a418820, |
| 147 | /*0a1d*/ 0x003f0000, |
| 148 | /*0a1e*/ 0x0000003f, |
| 149 | /*0a1f*/ 0x0002c06e, |
| 150 | /*0a20*/ 0x02c002c0, |
| 151 | /*0a21*/ 0x02c002c0, |
| 152 | /*0a22*/ 0x000002c0, |
| 153 | /*0a23*/ 0x42080010, |
| 154 | /*0a24*/ 0x00000003 |
| 155 | }; |
| 156 | |
| 157 | static const uint32_t DDR_PHY_ADR_I_REGSET_M3[DDR_PHY_ADR_I_REGSET_NUM_M3] = { |
| 158 | /*0a80*/ 0x04040404, |
| 159 | /*0a81*/ 0x00000404, |
| 160 | /*0a82*/ 0x00000000, |
| 161 | /*0a83*/ 0x00000000, |
| 162 | /*0a84*/ 0x00000000, |
| 163 | /*0a85*/ 0x00000000, |
| 164 | /*0a86*/ 0x00000002, |
| 165 | /*0a87*/ 0x00000000, |
| 166 | /*0a88*/ 0x00000000, |
| 167 | /*0a89*/ 0x00000000, |
| 168 | /*0a8a*/ 0x00400320, |
| 169 | /*0a8b*/ 0x00000040, |
| 170 | /*0a8c*/ 0x00000000, |
| 171 | /*0a8d*/ 0x00000000, |
| 172 | /*0a8e*/ 0x00000000, |
| 173 | /*0a8f*/ 0x01000000, |
| 174 | /*0a90*/ 0x00020003, |
| 175 | /*0a91*/ 0x00000000, |
| 176 | /*0a92*/ 0x00000000, |
| 177 | /*0a93*/ 0x00000000, |
| 178 | /*0a94*/ 0x0000002a, |
| 179 | /*0a95*/ 0x00000015, |
| 180 | /*0a96*/ 0x00000015, |
| 181 | /*0a97*/ 0x0000002a, |
| 182 | /*0a98*/ 0x00000033, |
| 183 | /*0a99*/ 0x0000000c, |
| 184 | /*0a9a*/ 0x0000000c, |
| 185 | /*0a9b*/ 0x00000033, |
| 186 | /*0a9c*/ 0x00000000, |
| 187 | /*0a9d*/ 0x00000000, |
| 188 | /*0a9e*/ 0x00000000, |
| 189 | /*0a9f*/ 0x0002c06e, |
| 190 | /*0aa0*/ 0x02c002c0, |
| 191 | /*0aa1*/ 0x02c002c0, |
| 192 | /*0aa2*/ 0x000002c0, |
| 193 | /*0aa3*/ 0x42080010, |
| 194 | /*0aa4*/ 0x00000003 |
| 195 | }; |
| 196 | |
| 197 | static const uint32_t DDR_PHY_ADR_G_REGSET_M3[DDR_PHY_ADR_G_REGSET_NUM_M3] = { |
| 198 | /*0b80*/ 0x00000001, |
| 199 | /*0b81*/ 0x00000000, |
| 200 | /*0b82*/ 0x00000005, |
| 201 | /*0b83*/ 0x04000f00, |
| 202 | /*0b84*/ 0x00020080, |
| 203 | /*0b85*/ 0x00020055, |
| 204 | /*0b86*/ 0x00000000, |
| 205 | /*0b87*/ 0x00000000, |
| 206 | /*0b88*/ 0x00000000, |
| 207 | /*0b89*/ 0x00000050, |
| 208 | /*0b8a*/ 0x00000000, |
| 209 | /*0b8b*/ 0x01010100, |
| 210 | /*0b8c*/ 0x00000600, |
| 211 | /*0b8d*/ 0x50640000, |
| 212 | /*0b8e*/ 0x01421142, |
| 213 | /*0b8f*/ 0x00000142, |
| 214 | /*0b90*/ 0x00000000, |
| 215 | /*0b91*/ 0x000f1600, |
| 216 | /*0b92*/ 0x0f160f16, |
| 217 | /*0b93*/ 0x0f160f16, |
| 218 | /*0b94*/ 0x00000003, |
| 219 | /*0b95*/ 0x0002c000, |
| 220 | /*0b96*/ 0x02c002c0, |
| 221 | /*0b97*/ 0x000002c0, |
| 222 | /*0b98*/ 0x01421142, |
| 223 | /*0b99*/ 0x00000142, |
| 224 | /*0b9a*/ 0x00000000, |
| 225 | /*0b9b*/ 0x00000000, |
| 226 | /*0b9c*/ 0x05020000, |
| 227 | /*0b9d*/ 0x00000000, |
| 228 | /*0b9e*/ 0x00027f6e, |
| 229 | /*0b9f*/ 0x047f027f, |
| 230 | /*0ba0*/ 0x00027f6e, |
| 231 | /*0ba1*/ 0x00047f6e, |
| 232 | /*0ba2*/ 0x0003554f, |
| 233 | /*0ba3*/ 0x0001554f, |
| 234 | /*0ba4*/ 0x0001554f, |
| 235 | /*0ba5*/ 0x0001554f, |
| 236 | /*0ba6*/ 0x0001554f, |
| 237 | /*0ba7*/ 0x00003fee, |
| 238 | /*0ba8*/ 0x0001554f, |
| 239 | /*0ba9*/ 0x00003fee, |
| 240 | /*0baa*/ 0x0001554f, |
| 241 | /*0bab*/ 0x00027f6e, |
| 242 | /*0bac*/ 0x0001554f, |
| 243 | /*0bad*/ 0x00000000, |
| 244 | /*0bae*/ 0x00000000, |
| 245 | /*0baf*/ 0x00000000, |
| 246 | /*0bb0*/ 0x65000000, |
| 247 | /*0bb1*/ 0x00000000, |
| 248 | /*0bb2*/ 0x00000000, |
| 249 | /*0bb3*/ 0x00000201, |
| 250 | /*0bb4*/ 0x00000000, |
| 251 | /*0bb5*/ 0x00000000, |
| 252 | /*0bb6*/ 0x00000000, |
| 253 | /*0bb7*/ 0x00000000, |
| 254 | /*0bb8*/ 0x00000000, |
| 255 | /*0bb9*/ 0x00000000, |
| 256 | /*0bba*/ 0x00000000, |
| 257 | /*0bbb*/ 0x00000000, |
| 258 | /*0bbc*/ 0x06e40000, |
| 259 | /*0bbd*/ 0x00000000, |
| 260 | /*0bbe*/ 0x00000000, |
| 261 | /*0bbf*/ 0x00010000 |
| 262 | }; |
| 263 | |
| 264 | static const uint32_t DDR_PI_REGSET_M3[DDR_PI_REGSET_NUM_M3] = { |
| 265 | /*0200*/ 0x00000b00, |
| 266 | /*0201*/ 0x00000100, |
| 267 | /*0202*/ 0x00000000, |
| 268 | /*0203*/ 0x0000ffff, |
| 269 | /*0204*/ 0x00000000, |
| 270 | /*0205*/ 0x0000ffff, |
| 271 | /*0206*/ 0x00000000, |
| 272 | /*0207*/ 0x304cffff, |
| 273 | /*0208*/ 0x00000200, |
| 274 | /*0209*/ 0x00000200, |
| 275 | /*020a*/ 0x00000200, |
| 276 | /*020b*/ 0x00000200, |
| 277 | /*020c*/ 0x0000304c, |
| 278 | /*020d*/ 0x00000200, |
| 279 | /*020e*/ 0x00000200, |
| 280 | /*020f*/ 0x00000200, |
| 281 | /*0210*/ 0x00000200, |
| 282 | /*0211*/ 0x0000304c, |
| 283 | /*0212*/ 0x00000200, |
| 284 | /*0213*/ 0x00000200, |
| 285 | /*0214*/ 0x00000200, |
| 286 | /*0215*/ 0x00000200, |
| 287 | /*0216*/ 0x00010000, |
| 288 | /*0217*/ 0x00000003, |
| 289 | /*0218*/ 0x01000001, |
| 290 | /*0219*/ 0x00000000, |
| 291 | /*021a*/ 0x00000000, |
| 292 | /*021b*/ 0x00000000, |
| 293 | /*021c*/ 0x00000000, |
| 294 | /*021d*/ 0x00000000, |
| 295 | /*021e*/ 0x00000000, |
| 296 | /*021f*/ 0x00000000, |
| 297 | /*0220*/ 0x00000000, |
| 298 | /*0221*/ 0x00000000, |
| 299 | /*0222*/ 0x00000000, |
| 300 | /*0223*/ 0x00000000, |
| 301 | /*0224*/ 0x00000000, |
| 302 | /*0225*/ 0x00000000, |
| 303 | /*0226*/ 0x00000000, |
| 304 | /*0227*/ 0x00000000, |
| 305 | /*0228*/ 0x00000000, |
| 306 | /*0229*/ 0x0f000101, |
| 307 | /*022a*/ 0x08492d25, |
| 308 | /*022b*/ 0x0e0c0004, |
| 309 | /*022c*/ 0x000e5000, |
| 310 | /*022d*/ 0x00000250, |
| 311 | /*022e*/ 0x00460003, |
| 312 | /*022f*/ 0x182600cf, |
| 313 | /*0230*/ 0x182600cf, |
| 314 | /*0231*/ 0x00000005, |
| 315 | /*0232*/ 0x00000000, |
| 316 | /*0233*/ 0x00000000, |
| 317 | /*0234*/ 0x00000000, |
| 318 | /*0235*/ 0x00000000, |
| 319 | /*0236*/ 0x00000000, |
| 320 | /*0237*/ 0x00000000, |
| 321 | /*0238*/ 0x00000000, |
| 322 | /*0239*/ 0x01000000, |
| 323 | /*023a*/ 0x00040404, |
| 324 | /*023b*/ 0x01280a00, |
| 325 | /*023c*/ 0x00000000, |
| 326 | /*023d*/ 0x000f0000, |
| 327 | /*023e*/ 0x00001803, |
| 328 | /*023f*/ 0x00000000, |
| 329 | /*0240*/ 0x00000000, |
| 330 | /*0241*/ 0x00060002, |
| 331 | /*0242*/ 0x00010001, |
| 332 | /*0243*/ 0x01000101, |
| 333 | /*0244*/ 0x04020201, |
| 334 | /*0245*/ 0x00080804, |
| 335 | /*0246*/ 0x00000000, |
| 336 | /*0247*/ 0x08030000, |
| 337 | /*0248*/ 0x15150408, |
| 338 | /*0249*/ 0x00000000, |
| 339 | /*024a*/ 0x00000000, |
| 340 | /*024b*/ 0x00000000, |
| 341 | /*024c*/ 0x000f0f00, |
| 342 | /*024d*/ 0x0000001e, |
| 343 | /*024e*/ 0x00000000, |
| 344 | /*024f*/ 0x01000300, |
| 345 | /*0250*/ 0x00000000, |
| 346 | /*0251*/ 0x00000000, |
| 347 | /*0252*/ 0x01000000, |
| 348 | /*0253*/ 0x00010101, |
| 349 | /*0254*/ 0x000e0e0e, |
| 350 | /*0255*/ 0x000c0c0c, |
| 351 | /*0256*/ 0x02060601, |
| 352 | /*0257*/ 0x00000000, |
| 353 | /*0258*/ 0x00000003, |
| 354 | /*0259*/ 0x00181703, |
| 355 | /*025a*/ 0x00280006, |
| 356 | /*025b*/ 0x00280016, |
| 357 | /*025c*/ 0x00000016, |
| 358 | /*025d*/ 0x00000000, |
| 359 | /*025e*/ 0x00000000, |
| 360 | /*025f*/ 0x00000000, |
| 361 | /*0260*/ 0x140a0000, |
| 362 | /*0261*/ 0x0005010a, |
| 363 | /*0262*/ 0x03018d03, |
| 364 | /*0263*/ 0x000a018d, |
| 365 | /*0264*/ 0x00060100, |
| 366 | /*0265*/ 0x01000006, |
| 367 | /*0266*/ 0x018e018e, |
| 368 | /*0267*/ 0x018e0100, |
| 369 | /*0268*/ 0x1111018e, |
| 370 | /*0269*/ 0x10010204, |
| 371 | /*026a*/ 0x09090650, |
| 372 | /*026b*/ 0x20110202, |
| 373 | /*026c*/ 0x00201000, |
| 374 | /*026d*/ 0x00201000, |
| 375 | /*026e*/ 0x04041000, |
| 376 | /*026f*/ 0x18020100, |
| 377 | /*0270*/ 0x00010118, |
| 378 | /*0271*/ 0x004b004a, |
| 379 | /*0272*/ 0x050f0000, |
| 380 | /*0273*/ 0x0c01021e, |
| 381 | /*0274*/ 0x34000000, |
| 382 | /*0275*/ 0x00000000, |
| 383 | /*0276*/ 0x00000000, |
| 384 | /*0277*/ 0x00000000, |
| 385 | /*0278*/ 0x0000d400, |
| 386 | /*0279*/ 0x0031002e, |
| 387 | /*027a*/ 0x00111136, |
| 388 | /*027b*/ 0x002e00d4, |
| 389 | /*027c*/ 0x11360031, |
| 390 | /*027d*/ 0x0000d411, |
| 391 | /*027e*/ 0x0031002e, |
| 392 | /*027f*/ 0x00111136, |
| 393 | /*0280*/ 0x002e00d4, |
| 394 | /*0281*/ 0x11360031, |
| 395 | /*0282*/ 0x0000d411, |
| 396 | /*0283*/ 0x0031002e, |
| 397 | /*0284*/ 0x00111136, |
| 398 | /*0285*/ 0x002e00d4, |
| 399 | /*0286*/ 0x11360031, |
| 400 | /*0287*/ 0x00d40011, |
| 401 | /*0288*/ 0x0031002e, |
| 402 | /*0289*/ 0x00111136, |
| 403 | /*028a*/ 0x002e00d4, |
| 404 | /*028b*/ 0x11360031, |
| 405 | /*028c*/ 0x0000d411, |
| 406 | /*028d*/ 0x0031002e, |
| 407 | /*028e*/ 0x00111136, |
| 408 | /*028f*/ 0x002e00d4, |
| 409 | /*0290*/ 0x11360031, |
| 410 | /*0291*/ 0x0000d411, |
| 411 | /*0292*/ 0x0031002e, |
| 412 | /*0293*/ 0x00111136, |
| 413 | /*0294*/ 0x002e00d4, |
| 414 | /*0295*/ 0x11360031, |
| 415 | /*0296*/ 0x02000011, |
| 416 | /*0297*/ 0x018d018d, |
| 417 | /*0298*/ 0x0c08018d, |
| 418 | /*0299*/ 0x1f121d22, |
| 419 | /*029a*/ 0x4301b344, |
| 420 | /*029b*/ 0x10172006, |
| 421 | /*029c*/ 0x1d220c10, |
| 422 | /*029d*/ 0x00001f12, |
| 423 | /*029e*/ 0x4301b344, |
| 424 | /*029f*/ 0x10172006, |
| 425 | /*02a0*/ 0x1d220c10, |
| 426 | /*02a1*/ 0x00001f12, |
| 427 | /*02a2*/ 0x4301b344, |
| 428 | /*02a3*/ 0x10172006, |
| 429 | /*02a4*/ 0x02000210, |
| 430 | /*02a5*/ 0x02000200, |
| 431 | /*02a6*/ 0x02000200, |
| 432 | /*02a7*/ 0x02000200, |
| 433 | /*02a8*/ 0x02000200, |
| 434 | /*02a9*/ 0x00000000, |
| 435 | /*02aa*/ 0x00000000, |
| 436 | /*02ab*/ 0x00000000, |
| 437 | /*02ac*/ 0x00000000, |
| 438 | /*02ad*/ 0x00000000, |
| 439 | /*02ae*/ 0x00000000, |
| 440 | /*02af*/ 0x00000000, |
| 441 | /*02b0*/ 0x00000000, |
| 442 | /*02b1*/ 0x00000000, |
| 443 | /*02b2*/ 0x00000000, |
| 444 | /*02b3*/ 0x00000000, |
| 445 | /*02b4*/ 0x00000000, |
| 446 | /*02b5*/ 0x00000400, |
| 447 | /*02b6*/ 0x15141312, |
| 448 | /*02b7*/ 0x11100f0e, |
| 449 | /*02b8*/ 0x080b0c0d, |
| 450 | /*02b9*/ 0x05040a09, |
| 451 | /*02ba*/ 0x01000706, |
| 452 | /*02bb*/ 0x00000302, |
| 453 | /*02bc*/ 0x01030201, |
| 454 | /*02bd*/ 0x00304c00, |
| 455 | /*02be*/ 0x0001e2f8, |
| 456 | /*02bf*/ 0x0000304c, |
| 457 | /*02c0*/ 0x0001e2f8, |
| 458 | /*02c1*/ 0x0000304c, |
| 459 | /*02c2*/ 0x0001e2f8, |
| 460 | /*02c3*/ 0x08000000, |
| 461 | /*02c4*/ 0x00000100, |
| 462 | /*02c5*/ 0x00000000, |
| 463 | /*02c6*/ 0x00000000, |
| 464 | /*02c7*/ 0x00000000, |
| 465 | /*02c8*/ 0x00000000, |
| 466 | /*02c9*/ 0x00000002 |
| 467 | }; |