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git01.mediatek.com / filogic / atf / 320b6051ee189196a0c16a52144c2fdfd12c1de0 / . / include / drivers / arm / gic_common.h
blob: 6a322a22a078df45b3835aeffe8a60797391a4ff [file] [log] [blame]
Achin Gupta92712a52015-09-03 14:18:02 +0100[diff] [blame]1/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __GIC_COMMON_H__
32#define __GIC_COMMON_H__
33
34/*******************************************************************************
35 * GIC Distributor interface general definitions
36 ******************************************************************************/
37/* Constants to categorise interrupts */
38#define MIN_SGI_ID 0
39#define MIN_PPI_ID 16
40#define MIN_SPI_ID 32
41
42/* Mask for the priority field common to all GIC interfaces */
43#define GIC_PRI_MASK 0xff
44
45/* Constant to indicate a spurious interrupt in all GIC versions */
46#define GIC_SPURIOUS_INTERRUPT 1023
47
48/* Constants to categorise priorities */
49#define GIC_HIGHEST_SEC_PRIORITY 0
50#define GIC_LOWEST_SEC_PRIORITY 127
51#define GIC_HIGHEST_NS_PRIORITY 128
52#define GIC_LOWEST_NS_PRIORITY 254 /* 255 would disable an interrupt */
53
54/*******************************************************************************
55 * GIC Distributor interface register offsets that are common to GICv3 & GICv2
56 ******************************************************************************/
57#define GICD_CTLR 0x0
58#define GICD_TYPER 0x4
59#define GICD_IIDR 0x8
60#define GICD_IGROUPR 0x80
61#define GICD_ISENABLER 0x100
62#define GICD_ICENABLER 0x180
63#define GICD_ISPENDR 0x200
64#define GICD_ICPENDR 0x280
65#define GICD_ISACTIVER 0x300
66#define GICD_ICACTIVER 0x380
67#define GICD_IPRIORITYR 0x400
68#define GICD_ICFGR 0xc00
69#define GICD_NSACR 0xe00
70
71/* GICD_CTLR bit definitions */
72#define CTLR_ENABLE_G0_SHIFT 0
73#define CTLR_ENABLE_G0_MASK 0x1
74#define CTLR_ENABLE_G0_BIT (1 << CTLR_ENABLE_G0_SHIFT)
75
76
77/*******************************************************************************
78 * GIC Distributor interface register constants that are common to GICv3 & GICv2
79 ******************************************************************************/
80#define PIDR2_ARCH_REV_SHIFT 4
81#define PIDR2_ARCH_REV_MASK 0xf
82
83/* GICv3 revision as reported by the PIDR2 register */
84#define ARCH_REV_GICV3 0x3
85/* GICv2 revision as reported by the PIDR2 register */
86#define ARCH_REV_GICV2 0x2
87
88#define IGROUPR_SHIFT 5
89#define ISENABLER_SHIFT 5
90#define ICENABLER_SHIFT ISENABLER_SHIFT
91#define ISPENDR_SHIFT 5
92#define ICPENDR_SHIFT ISPENDR_SHIFT
93#define ISACTIVER_SHIFT 5
94#define ICACTIVER_SHIFT ISACTIVER_SHIFT
95#define IPRIORITYR_SHIFT 2
96#define ICFGR_SHIFT 4
97#define NSACR_SHIFT 4
98
99/* GICD_TYPER shifts and masks */
100#define TYPER_IT_LINES_NO_SHIFT 0
101#define TYPER_IT_LINES_NO_MASK 0x1f
102
103/* Value used to initialize Normal world interrupt priorities four at a time */
104#define GICD_IPRIORITYR_DEF_VAL \
105 (GIC_HIGHEST_NS_PRIORITY | \
106 (GIC_HIGHEST_NS_PRIORITY << 8) | \
107 (GIC_HIGHEST_NS_PRIORITY << 16) | \
108 (GIC_HIGHEST_NS_PRIORITY << 24))
109
110#ifndef __ASSEMBLY__
111
112#include <mmio.h>
113#include <stdint.h>
114
115/*******************************************************************************
116 * GIC Distributor interface register accessors that are common to GICv3 & GICv2
117 ******************************************************************************/
118static inline unsigned int gicd_read_ctlr(uintptr_t base)
119{
120 return mmio_read_32(base + GICD_CTLR);
121}
122
123static inline unsigned int gicd_read_typer(uintptr_t base)
124{
125 return mmio_read_32(base + GICD_TYPER);
126}
127
128static inline unsigned int gicd_read_iidr(uintptr_t base)
129{
130 return mmio_read_32(base + GICD_IIDR);
131}
132
133static inline void gicd_write_ctlr(uintptr_t base, unsigned int val)
134{
135 mmio_write_32(base + GICD_CTLR, val);
136}
137
138/*******************************************************************************
139 * GIC Distributor function prototypes
140 ******************************************************************************/
141unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id);
142unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id);
143unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id);
144unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id);
145unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id);
146unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id);
147unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id);
148unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id);
149unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id);
150unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id);
151void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val);
152void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val);
153void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val);
154void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val);
155void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val);
156void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val);
157void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val);
158void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val);
159void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val);
160void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val);
161unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id);
162void gicd_set_igroupr(uintptr_t base, unsigned int id);
163void gicd_clr_igroupr(uintptr_t base, unsigned int id);
164void gicd_set_isenabler(uintptr_t base, unsigned int id);
165void gicd_set_icenabler(uintptr_t base, unsigned int id);
166void gicd_set_ispendr(uintptr_t base, unsigned int id);
167void gicd_set_icpendr(uintptr_t base, unsigned int id);
168void gicd_set_isactiver(uintptr_t base, unsigned int id);
169void gicd_set_icactiver(uintptr_t base, unsigned int id);
170
171
172#endif /* __ASSEMBLY__ */
173#endif /* __GIC_COMMON_H__ */