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Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Tony Xief6118cc2016-01-15 17:17:32 +08005 */
6
7#include <arm_gic.h>
8#include <assert.h>
9#include <bl_common.h>
10#include <console.h>
11#include <debug.h>
Antonio Nino Diaz2361fcc2016-05-05 15:25:02 +010012#include <generic_delay_timer.h>
Tony Xief6118cc2016-01-15 17:17:32 +080013#include <mmio.h>
14#include <platform.h>
15#include <plat_private.h>
16#include <platform_def.h>
17
18/*******************************************************************************
19 * Declarations of linker defined symbols which will help us find the layout
20 * of trusted SRAM
21 ******************************************************************************/
22unsigned long __RO_START__;
23unsigned long __RO_END__;
24
Tony Xief6118cc2016-01-15 17:17:32 +080025/*
26 * The next 2 constants identify the extents of the code & RO data region.
27 * These addresses are used by the MMU setup code and therefore they must be
28 * page-aligned. It is the responsibility of the linker script to ensure that
29 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
30 */
31#define BL31_RO_BASE (unsigned long)(&__RO_START__)
32#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
33
Tony Xief6118cc2016-01-15 17:17:32 +080034static entry_point_info_t bl32_ep_info;
35static entry_point_info_t bl33_ep_info;
36
37/*******************************************************************************
38 * Return a pointer to the 'entry_point_info' structure of the next image for
39 * the security state specified. BL33 corresponds to the non-secure image type
40 * while BL32 corresponds to the secure image type. A NULL pointer is returned
41 * if the image does not exist.
42 ******************************************************************************/
43entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
44{
45 entry_point_info_t *next_image_info;
46
47 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
48
49 /* None of the images on this platform can have 0x0 as the entrypoint */
50 if (next_image_info->pc)
51 return next_image_info;
52 else
53 return NULL;
54}
55
tony.xie54973e72017-04-24 16:18:10 +080056#pragma weak params_early_setup
57void params_early_setup(void *plat_param_from_bl2)
58{
59}
60
Tony Xief6118cc2016-01-15 17:17:32 +080061/*******************************************************************************
62 * Perform any BL3-1 early platform setup. Here is an opportunity to copy
63 * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
64 * are lost (potentially). This needs to be done before the MMU is initialized
65 * so that the memory layout can be used while creating page tables.
66 * BL2 has flushed this information to memory, so we are guaranteed to pick up
67 * good data.
68 ******************************************************************************/
69void bl31_early_platform_setup(bl31_params_t *from_bl2,
70 void *plat_params_from_bl2)
71{
72 console_init(PLAT_RK_UART_BASE, PLAT_RK_UART_CLOCK,
73 PLAT_RK_UART_BAUDRATE);
74
75 VERBOSE("bl31_setup\n");
76
77 /* Passing a NULL context is a critical programming error */
78 assert(from_bl2);
79
80 assert(from_bl2->h.type == PARAM_BL31);
81 assert(from_bl2->h.version >= VERSION_1);
82
83 bl32_ep_info = *from_bl2->bl32_ep_info;
84 bl33_ep_info = *from_bl2->bl33_ep_info;
85
Caesar Wang3e3c5b02016-05-25 19:03:04 +080086 /* there may have some board sepcific message need to initialize */
87 params_early_setup(plat_params_from_bl2);
Tony Xief6118cc2016-01-15 17:17:32 +080088}
89
90/*******************************************************************************
91 * Perform any BL3-1 platform setup code
92 ******************************************************************************/
93void bl31_platform_setup(void)
94{
Antonio Nino Diaz2361fcc2016-05-05 15:25:02 +010095 generic_delay_timer_init();
Tony Xief6118cc2016-01-15 17:17:32 +080096 plat_rockchip_soc_init();
97
98 /* Initialize the gic cpu and distributor interfaces */
99 plat_rockchip_gic_driver_init();
100 plat_rockchip_gic_init();
101 plat_rockchip_pmu_init();
102}
103
104/*******************************************************************************
105 * Perform the very early platform specific architectural setup here. At the
106 * moment this is only intializes the mmu in a quick and dirty way.
107 ******************************************************************************/
108void bl31_plat_arch_setup(void)
109{
110 plat_cci_init();
111 plat_cci_enable();
112 plat_configure_mmu_el3(BL31_RO_BASE,
Masahiro Yamada0fac5af2016-12-28 16:11:41 +0900113 BL_COHERENT_RAM_END - BL31_RO_BASE,
Tony Xief6118cc2016-01-15 17:17:32 +0800114 BL31_RO_BASE,
115 BL31_RO_LIMIT,
Masahiro Yamada0fac5af2016-12-28 16:11:41 +0900116 BL_COHERENT_RAM_BASE,
117 BL_COHERENT_RAM_END);
Tony Xief6118cc2016-01-15 17:17:32 +0800118}