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Yatharth Kochar736a3bf2015-10-11 14:14:55 +01001/*
Yatharth Kocharede39cb2016-11-14 12:01:04 +00002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Yatharth Kochar736a3bf2015-10-11 14:14:55 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Yatharth Kochar736a3bf2015-10-11 14:14:55 +01005 */
6
7#include <bl_common.h>
Sathees Balya22576072018-09-03 17:41:13 +01008#include <debug.h>
Yatharth Kochar736a3bf2015-10-11 14:14:55 +01009#include <errno.h>
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010010#include <plat_arm.h>
Isla Mitchelld2548792017-07-14 10:48:25 +010011#include <platform.h>
Sathees Balya22576072018-09-03 17:41:13 +010012#include <sds.h>
Yatharth Kocharede39cb2016-11-14 12:01:04 +000013#include <sp805.h>
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010014#include <tbbr_img_def.h>
15#include <v2m_def.h>
16
Yatharth Kocharede39cb2016-11-14 12:01:04 +000017void juno_reset_to_aarch32_state(void);
18
Sathees Balya22576072018-09-03 17:41:13 +010019static int is_watchdog_reset(void)
20{
21#if !CSS_USE_SCMI_SDS_DRIVER
22 #define RESET_REASON_WDOG_RESET (0x2)
23 const uint32_t *reset_flags_ptr = (const uint32_t *)SSC_GPRETN;
24
25 if ((*reset_flags_ptr & RESET_REASON_WDOG_RESET) != 0)
26 return 1;
27
28 return 0;
29#else
30 int ret;
31 uint32_t scp_reset_synd_flags;
32
33 ret = sds_init();
34 if (ret != SDS_OK) {
35 ERROR("SCP SDS initialization failed\n");
36 panic();
37 }
38
39 ret = sds_struct_read(SDS_RESET_SYNDROME_STRUCT_ID,
40 SDS_RESET_SYNDROME_OFFSET,
41 &scp_reset_synd_flags,
42 SDS_RESET_SYNDROME_SIZE,
43 SDS_ACCESS_MODE_NON_CACHED);
44 if (ret != SDS_OK) {
45 ERROR("Getting reset reason from SDS failed\n");
46 panic();
47 }
48
49 /* Check if the WATCHDOG_RESET_BIT is set in the reset syndrome */
50 if (scp_reset_synd_flags & SDS_RESET_SYNDROME_AP_WD_RESET_BIT)
51 return 1;
52
53 return 0;
54#endif
55}
56
57/*******************************************************************************
58 * The following function checks if Firmware update is needed,
59 * by checking if TOC in FIP image is valid or watchdog reset happened.
60 ******************************************************************************/
61int plat_arm_bl1_fwu_needed(void)
62{
63 const uint32_t *nv_flags_ptr = (const uint32_t *)V2M_SYS_NVFLAGS_ADDR;
64
65 /* Check if TOC is invalid or watchdog reset happened. */
66 if ((arm_io_is_toc_valid() != 1) ||
67 (((*nv_flags_ptr == -EAUTH) || (*nv_flags_ptr == -ENOENT))
68 && is_watchdog_reset()))
69 return 1;
70
71 return 0;
72}
73
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010074/*******************************************************************************
75 * On JUNO update the arg2 with address of SCP_BL2U image info.
76 ******************************************************************************/
77void bl1_plat_set_ep_info(unsigned int image_id,
78 entry_point_info_t *ep_info)
79{
80 if (image_id == BL2U_IMAGE_ID) {
81 image_desc_t *image_desc = bl1_plat_get_image_desc(SCP_BL2U_IMAGE_ID);
82 ep_info->args.arg2 = (unsigned long)&image_desc->image_info;
83 }
84}
85
86/*******************************************************************************
87 * On Juno clear SYS_NVFLAGS and wait for watchdog reset.
88 ******************************************************************************/
Dan Handley89f8f332015-12-15 14:28:24 +000089__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010090{
91 unsigned int *nv_flags_clr = (unsigned int *)
92 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR);
93 unsigned int *nv_flags_ptr = (unsigned int *)
94 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS);
95
96 /* Clear the NV flags register. */
97 *nv_flags_clr = *nv_flags_ptr;
98
99 while (1)
100 wfi();
101}
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000102
103#if JUNO_AARCH32_EL3_RUNTIME
104void bl1_plat_prepare_exit(entry_point_info_t *ep_info)
105{
106#if !ARM_DISABLE_TRUSTED_WDOG
107 /* Disable watchdog before leaving BL1 */
108 sp805_stop(ARM_SP805_TWDG_BASE);
109#endif
110
111 juno_reset_to_aarch32_state();
112}
113#endif /* JUNO_AARCH32_EL3_RUNTIME */