| Paul Beesley | 9774302 | 2019-07-12 11:37:07 +0100 | [diff] [blame] | 1 | AMB - AXI MBUS address decoding |
| 2 | =============================== |
| 3 | |
| 4 | AXI to M-bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs. |
| 5 | |
| 6 | The Runit offers a second level of address windows lookup. It is used to map |
| 7 | transaction towards the CD BootROM, SPI0, SPI1 and Device bus (NOR). |
| 8 | |
| 9 | The Runit contains eight configurable windows. Each window defines a contiguous, |
| 10 | address space and the properties associated with that address space. |
| 11 | |
| 12 | :: |
| 13 | |
| 14 | Unit Bank ATTR |
| 15 | Device-Bus DEV_BOOT_CS 0x2F |
| 16 | DEV_CS0 0x3E |
| 17 | DEV_CS1 0x3D |
| 18 | DEV_CS2 0x3B |
| 19 | DEV_CS3 0x37 |
| 20 | SPI-0 SPI_A_CS0 0x1E |
| 21 | SPI_A_CS1 0x5E |
| 22 | SPI_A_CS2 0x9E |
| 23 | SPI_A_CS3 0xDE |
| 24 | SPI_A_CS4 0x1F |
| 25 | SPI_A_CS5 0x5F |
| 26 | SPI_A_CS6 0x9F |
| 27 | SPI_A_CS7 0xDF |
| 28 | SPI SPI_B_CS0 0x1A |
| 29 | SPI_B_CS1 0x5A |
| 30 | SPI_B_CS2 0x9A |
| 31 | SPI_B_CS3 0xDA |
| 32 | BOOT_ROM BOOT_ROM 0x1D |
| 33 | UART UART 0x01 |
| 34 | |
| 35 | Mandatory functions |
| 36 | ------------------- |
| 37 | |
| 38 | - marvell_get_amb_memory_map |
| 39 | Returns the AMB windows configuration and the number of windows |
| 40 | |
| 41 | Mandatory structures |
| 42 | -------------------- |
| 43 | |
| 44 | - amb_memory_map |
| 45 | Array that include the configuration of the windows. Every window/entry is a |
| 46 | struct which has 2 parameters: |
| 47 | |
| 48 | - Base address of the window |
| 49 | - Attribute of the window |
| 50 | |
| 51 | Examples |
| 52 | -------- |
| 53 | |
| 54 | .. code:: c |
| 55 | |
| 56 | struct addr_map_win amb_memory_map[] = { |
| 57 | {0xf900, AMB_DEV_CS0_ID}, |
| 58 | }; |