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Stephan Gerhold14fdf072021-12-01 20:01:11 +01001#
Stephan Gerhold69fabaa2023-03-14 11:09:44 +01002# Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
Stephan Gerhold14fdf072021-12-01 20:01:11 +01003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include drivers/arm/gic/v2/gicv2.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_BL_COMMON_SOURCES := ${XLAT_TABLES_LIB_SRCS}
11
12PLAT_INCLUDES := -Iinclude/plat/arm/common/${ARCH} \
13 -Iplat/qti/msm8916/include
14
15BL31_SOURCES += ${GICV2_SOURCES} \
16 drivers/delay_timer/delay_timer.c \
17 drivers/delay_timer/generic_delay_timer.c \
18 lib/cpus/${ARCH}/cortex_a53.S \
19 plat/common/plat_gicv2.c \
20 plat/common/plat_psci_common.c \
21 plat/qti/msm8916/msm8916_bl31_setup.c \
Stephan Gerhold765e8592021-12-01 20:04:44 +010022 plat/qti/msm8916/msm8916_cpu_boot.c \
Stephan Gerhold253fef02021-12-01 20:03:33 +010023 plat/qti/msm8916/msm8916_gicv2.c \
Stephan Gerhold14fdf072021-12-01 20:01:11 +010024 plat/qti/msm8916/msm8916_pm.c \
25 plat/qti/msm8916/msm8916_topology.c \
26 plat/qti/msm8916/${ARCH}/msm8916_helpers.S \
27 plat/qti/msm8916/${ARCH}/uartdm_console.S
28
29# Only BL31 is supported at the moment and is entered on a single CPU
30RESET_TO_BL31 := 1
31COLD_BOOT_SINGLE_CPU := 1
32
33# Build config flags
34# ------------------
35BL31_BASE ?= 0x86500000
36BL32_BASE ?= 0x86000000
37PRELOADED_BL33_BASE ?= 0x8f600000
38
39# Have different sections for code and rodata
40SEPARATE_CODE_AND_RODATA := 1
41
42# Single cluster
43WARMBOOT_ENABLE_DCACHE_EARLY := 1
44
45# Disable features unsupported in ARMv8.0
Andre Przywara30661a92023-02-03 15:30:14 +000046ENABLE_SPE_FOR_NS := 0
Stephan Gerhold14fdf072021-12-01 20:01:11 +010047ENABLE_SVE_FOR_NS := 0
48
Stephan Gerhold69fabaa2023-03-14 11:09:44 +010049# Disable workarounds unnecessary for Cortex-A53
50WORKAROUND_CVE_2017_5715 := 0
51WORKAROUND_CVE_2022_23960 := 0
52
Stephan Gerhold14fdf072021-12-01 20:01:11 +010053# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply
54ERRATA_A53_819472 := 1
55ERRATA_A53_824069 := 1
56ERRATA_A53_826319 := 1
57ERRATA_A53_827319 := 1
58ERRATA_A53_835769 := 1
59ERRATA_A53_836870 := 1
60ERRATA_A53_843419 := 1
61ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3
62ERRATA_A53_1530924 := 1
63
64$(eval $(call add_define,BL31_BASE))
65$(eval $(call add_define,BL32_BASE))