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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <bl_common.h>
35#include <context.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000036#include <context_mgmt.h>
Dan Handley714a0d22014-04-09 13:13:04 +010037#include <debug.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010038#include <platform.h>
Andrew Thoelke4e126072014-06-04 21:10:52 +010039#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010040#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
Achin Gupta607084e2014-02-09 18:24:19 +000042/*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000043 * SPD power management operations, expected to be supplied by the registered
44 * SPD on successful SP initialization
Achin Gupta607084e2014-02-09 18:24:19 +000045 */
Dan Handleye2712bc2014-04-10 15:37:22 +010046const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +000047
Achin Gupta4f6ad662013-10-25 09:08:21 +010048/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010049 * Grand array that holds the platform's topology information for state
50 * management of affinity instances. Each node (aff_map_node) in the array
51 * corresponds to an affinity instance e.g. cluster, cpu within an mpidr
52 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010053aff_map_node_t psci_aff_map[PSCI_NUM_AFFS]
Achin Gupta4f6ad662013-10-25 09:08:21 +010054__attribute__ ((section("tzfw_coherent_mem")));
55
56/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010057 * Pointer to functions exported by the platform to complete power mgmt. ops
58 ******************************************************************************/
Dan Handleya4cb68e2014-04-23 13:47:06 +010059const plat_pm_ops_t *psci_plat_pm_ops;
Achin Gupta4f6ad662013-10-25 09:08:21 +010060
61/*******************************************************************************
Achin Guptaa45e3972013-12-05 15:10:48 +000062 * Routine to return the maximum affinity level to traverse to after a cpu has
63 * been physically powered up. It is expected to be called immediately after
64 * reset from assembler code. It has to find its 'aff_map_node' instead of
65 * getting it as an argument.
66 * TODO: Calling psci_get_aff_map_node() with the MMU disabled is slow. Add
67 * support to allow faster access to the target affinity level.
68 ******************************************************************************/
69int get_power_on_target_afflvl(unsigned long mpidr)
70{
Dan Handleye2712bc2014-04-10 15:37:22 +010071 aff_map_node_t *node;
Achin Guptaa45e3972013-12-05 15:10:48 +000072 unsigned int state;
Vikram Kanigirif100f412014-04-01 19:26:26 +010073 int afflvl;
Achin Guptaa45e3972013-12-05 15:10:48 +000074
75 /* Retrieve our node from the topology tree */
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000076 node = psci_get_aff_map_node(mpidr & MPIDR_AFFINITY_MASK,
77 MPIDR_AFFLVL0);
Achin Guptaa45e3972013-12-05 15:10:48 +000078 assert(node);
79
80 /*
81 * Return the maximum supported affinity level if this cpu was off.
82 * Call the handler in the suspend code if this cpu had been suspended.
83 * Any other state is invalid.
84 */
Achin Gupta75f73672013-12-05 16:33:10 +000085 state = psci_get_state(node);
Achin Guptaa45e3972013-12-05 15:10:48 +000086 if (state == PSCI_STATE_ON_PENDING)
87 return get_max_afflvl();
88
Vikram Kanigirif100f412014-04-01 19:26:26 +010089 if (state == PSCI_STATE_SUSPEND) {
90 afflvl = psci_get_aff_map_node_suspend_afflvl(node);
91 assert(afflvl != PSCI_INVALID_DATA);
92 return afflvl;
93 }
Achin Guptaa45e3972013-12-05 15:10:48 +000094 return PSCI_E_INVALID_PARAMS;
95}
96
97/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010098 * Simple routine to retrieve the maximum affinity level supported by the
99 * platform and check that it makes sense.
100 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +0100101int get_max_afflvl(void)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100102{
103 int aff_lvl;
104
105 aff_lvl = plat_get_max_afflvl();
106 assert(aff_lvl <= MPIDR_MAX_AFFLVL && aff_lvl >= MPIDR_AFFLVL0);
107
108 return aff_lvl;
109}
110
111/*******************************************************************************
112 * Simple routine to set the id of an affinity instance at a given level in the
113 * mpidr.
114 ******************************************************************************/
115unsigned long mpidr_set_aff_inst(unsigned long mpidr,
116 unsigned char aff_inst,
117 int aff_lvl)
118{
119 unsigned long aff_shift;
120
121 assert(aff_lvl <= MPIDR_AFFLVL3);
122
123 /*
124 * Decide the number of bits to shift by depending upon
125 * the affinity level
126 */
127 aff_shift = get_afflvl_shift(aff_lvl);
128
129 /* Clear the existing affinity instance & set the new one*/
130 mpidr &= ~(MPIDR_AFFLVL_MASK << aff_shift);
131 mpidr |= aff_inst << aff_shift;
132
133 return mpidr;
134}
135
136/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000137 * This function sanity checks a range of affinity levels.
138 ******************************************************************************/
139int psci_check_afflvl_range(int start_afflvl, int end_afflvl)
140{
141 /* Sanity check the parameters passed */
142 if (end_afflvl > MPIDR_MAX_AFFLVL)
143 return PSCI_E_INVALID_PARAMS;
144
145 if (start_afflvl < MPIDR_AFFLVL0)
146 return PSCI_E_INVALID_PARAMS;
147
148 if (end_afflvl < start_afflvl)
149 return PSCI_E_INVALID_PARAMS;
150
151 return PSCI_E_SUCCESS;
152}
153
154/*******************************************************************************
155 * This function is passed an array of pointers to affinity level nodes in the
156 * topology tree for an mpidr. It picks up locks for each affinity level bottom
157 * up in the range specified.
158 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100159void psci_acquire_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000160 int end_afflvl,
Dan Handleye2712bc2014-04-10 15:37:22 +0100161 mpidr_aff_map_nodes_t mpidr_nodes)
Achin Gupta0959db52013-12-02 17:33:04 +0000162{
163 int level;
164
165 for (level = start_afflvl; level <= end_afflvl; level++) {
166 if (mpidr_nodes[level] == NULL)
167 continue;
Andrew Thoelke958cc022014-06-09 12:54:15 +0100168 bakery_lock_get(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000169 }
170}
171
172/*******************************************************************************
173 * This function is passed an array of pointers to affinity level nodes in the
174 * topology tree for an mpidr. It releases the lock for each affinity level top
175 * down in the range specified.
176 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100177void psci_release_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000178 int end_afflvl,
Dan Handleye2712bc2014-04-10 15:37:22 +0100179 mpidr_aff_map_nodes_t mpidr_nodes)
Achin Gupta0959db52013-12-02 17:33:04 +0000180{
181 int level;
182
183 for (level = end_afflvl; level >= start_afflvl; level--) {
184 if (mpidr_nodes[level] == NULL)
185 continue;
Andrew Thoelke958cc022014-06-09 12:54:15 +0100186 bakery_lock_release(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000187 }
188}
189
190/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100191 * Simple routine to determine whether an affinity instance at a given level
192 * in an mpidr exists or not.
193 ******************************************************************************/
194int psci_validate_mpidr(unsigned long mpidr, int level)
195{
Dan Handleye2712bc2014-04-10 15:37:22 +0100196 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100197
198 node = psci_get_aff_map_node(mpidr, level);
199 if (node && (node->state & PSCI_AFF_PRESENT))
200 return PSCI_E_SUCCESS;
201 else
202 return PSCI_E_INVALID_PARAMS;
203}
204
205/*******************************************************************************
Andrew Thoelke4e126072014-06-04 21:10:52 +0100206 * This function determines the full entrypoint information for the requested
207 * PSCI entrypoint on power on/resume and saves this in the non-secure CPU
208 * cpu_context, ready for when the core boots.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100209 ******************************************************************************/
Andrew Thoelke4e126072014-06-04 21:10:52 +0100210int psci_save_ns_entry(uint64_t mpidr,
211 uint64_t entrypoint, uint64_t context_id,
212 uint32_t ns_scr_el3, uint32_t ns_sctlr_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100213{
Andrew Thoelke4e126072014-06-04 21:10:52 +0100214 uint32_t ep_attr, mode, sctlr, daif, ee;
215 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100216
Andrew Thoelke4e126072014-06-04 21:10:52 +0100217 sctlr = ns_scr_el3 & SCR_HCE_BIT ? read_sctlr_el2() : ns_sctlr_el1;
218 ee = 0;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100219
Andrew Thoelke4e126072014-06-04 21:10:52 +0100220 ep_attr = NON_SECURE | EP_ST_DISABLE;
221 if (sctlr & SCTLR_EE_BIT) {
222 ep_attr |= EP_EE_BIG;
223 ee = 1;
224 }
225 SET_PARAM_HEAD(&ep, PARAM_EP, VERSION_1, ep_attr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100226
Andrew Thoelke4e126072014-06-04 21:10:52 +0100227 ep.pc = entrypoint;
228 memset(&ep.args, 0, sizeof(ep.args));
229 ep.args.arg0 = context_id;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100230
231 /*
232 * Figure out whether the cpu enters the non-secure address space
233 * in aarch32 or aarch64
234 */
Andrew Thoelke4e126072014-06-04 21:10:52 +0100235 if (ns_scr_el3 & SCR_RW_BIT) {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100236
237 /*
238 * Check whether a Thumb entry point has been provided for an
239 * aarch64 EL
240 */
241 if (entrypoint & 0x1)
242 return PSCI_E_INVALID_PARAMS;
243
Andrew Thoelke4e126072014-06-04 21:10:52 +0100244 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE_EL2 : MODE_EL1;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100245
Andrew Thoelke4e126072014-06-04 21:10:52 +0100246 ep.spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100247 } else {
248
Andrew Thoelke4e126072014-06-04 21:10:52 +0100249 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100250
251 /*
252 * TODO: Choose async. exception bits if HYP mode is not
253 * implemented according to the values of SCR.{AW, FW} bits
254 */
Vikram Kanigiri9851e422014-05-13 14:42:08 +0100255 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
256
Andrew Thoelke4e126072014-06-04 21:10:52 +0100257 ep.spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100258 }
259
Andrew Thoelke4e126072014-06-04 21:10:52 +0100260 /* initialise an entrypoint to set up the CPU context */
261 cm_init_context(mpidr, &ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100262
Andrew Thoelke4e126072014-06-04 21:10:52 +0100263 return PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100264}
265
266/*******************************************************************************
Achin Gupta75f73672013-12-05 16:33:10 +0000267 * This function takes a pointer to an affinity node in the topology tree and
268 * returns its state. State of a non-leaf node needs to be calculated.
269 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100270unsigned short psci_get_state(aff_map_node_t *node)
Achin Gupta75f73672013-12-05 16:33:10 +0000271{
272 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
273
274 /* A cpu node just contains the state which can be directly returned */
275 if (node->level == MPIDR_AFFLVL0)
276 return (node->state >> PSCI_STATE_SHIFT) & PSCI_STATE_MASK;
277
278 /*
279 * For an affinity level higher than a cpu, the state has to be
280 * calculated. It depends upon the value of the reference count
281 * which is managed by each node at the next lower affinity level
282 * e.g. for a cluster, each cpu increments/decrements the reference
283 * count. If the reference count is 0 then the affinity level is
284 * OFF else ON.
285 */
286 if (node->ref_count)
287 return PSCI_STATE_ON;
288 else
289 return PSCI_STATE_OFF;
290}
291
292/*******************************************************************************
293 * This function takes a pointer to an affinity node in the topology tree and
294 * a target state. State of a non-leaf node needs to be converted to a reference
295 * count. State of a leaf node can be set directly.
296 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100297void psci_set_state(aff_map_node_t *node, unsigned short state)
Achin Gupta75f73672013-12-05 16:33:10 +0000298{
299 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
300
301 /*
302 * For an affinity level higher than a cpu, the state is used
303 * to decide whether the reference count is incremented or
304 * decremented. Entry into the ON_PENDING state does not have
305 * effect.
306 */
307 if (node->level > MPIDR_AFFLVL0) {
308 switch (state) {
309 case PSCI_STATE_ON:
310 node->ref_count++;
311 break;
312 case PSCI_STATE_OFF:
313 case PSCI_STATE_SUSPEND:
314 node->ref_count--;
315 break;
316 case PSCI_STATE_ON_PENDING:
317 /*
318 * An affinity level higher than a cpu will not undergo
319 * a state change when it is about to be turned on
320 */
321 return;
322 default:
323 assert(0);
324 }
325 } else {
326 node->state &= ~(PSCI_STATE_MASK << PSCI_STATE_SHIFT);
327 node->state |= (state & PSCI_STATE_MASK) << PSCI_STATE_SHIFT;
328 }
329}
330
331/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100332 * An affinity level could be on, on_pending, suspended or off. These are the
Achin Gupta3140a9e2013-12-02 16:23:12 +0000333 * logical states it can be in. Physically either it is off or on. When it is in
334 * the state on_pending then it is about to be turned on. It is not possible to
Achin Gupta4f6ad662013-10-25 09:08:21 +0100335 * tell whether that's actually happenned or not. So we err on the side of
336 * caution & treat the affinity level as being turned off.
337 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100338unsigned short psci_get_phys_state(aff_map_node_t *node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100339{
Achin Gupta75f73672013-12-05 16:33:10 +0000340 unsigned int state;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100341
Achin Gupta75f73672013-12-05 16:33:10 +0000342 state = psci_get_state(node);
343 return get_phys_state(state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100344}
345
346/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000347 * This function takes an array of pointers to affinity instance nodes in the
348 * topology tree and calls the physical power on handler for the corresponding
349 * affinity levels
350 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100351static int psci_call_power_on_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000352 int start_afflvl,
353 int end_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100354 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta0959db52013-12-02 17:33:04 +0000355{
356 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100357 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000358
359 for (level = end_afflvl; level >= start_afflvl; level--) {
360 node = mpidr_nodes[level];
361 if (node == NULL)
362 continue;
363
364 /*
365 * If we run into any trouble while powering up an
366 * affinity instance, then there is no recovery path
367 * so simply return an error and let the caller take
368 * care of the situation.
369 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100370 rc = pon_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000371 if (rc != PSCI_E_SUCCESS)
372 break;
373 }
374
375 return rc;
376}
377
378/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100379 * Generic handler which is called when a cpu is physically powered on. It
Achin Gupta0959db52013-12-02 17:33:04 +0000380 * traverses through all the affinity levels performing generic, architectural,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100381 * platform setup and state management e.g. for a cluster that's been powered
382 * on, it will call the platform specific code which will enable coherency at
383 * the interconnect level. For a cpu it could mean turning on the MMU etc.
384 *
Achin Gupta0959db52013-12-02 17:33:04 +0000385 * The state of all the relevant affinity levels is changed after calling the
386 * affinity level specific handlers as their actions would depend upon the state
387 * the affinity level is exiting from.
388 *
389 * The affinity level specific handlers are called in descending order i.e. from
390 * the highest to the lowest affinity level implemented by the platform because
391 * to turn on affinity level X it is neccesary to turn on affinity level X + 1
392 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100393 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100394void psci_afflvl_power_on_finish(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000395 int end_afflvl,
Dan Handleye2712bc2014-04-10 15:37:22 +0100396 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100397{
Dan Handleye2712bc2014-04-10 15:37:22 +0100398 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Gupta0959db52013-12-02 17:33:04 +0000399 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100400
Achin Gupta4f6ad662013-10-25 09:08:21 +0100401 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000402 * Collect the pointers to the nodes in the topology tree for
403 * each affinity instance in the mpidr. If this function does
404 * not return successfully then either the mpidr or the affinity
405 * levels are incorrect. Either case is an irrecoverable error.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100406 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100407 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000408 start_afflvl,
409 end_afflvl,
410 mpidr_nodes);
James Morrissey40a6f642014-02-10 14:24:36 +0000411 if (rc != PSCI_E_SUCCESS)
412 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100413
414 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000415 * This function acquires the lock corresponding to each affinity
416 * level so that by the time all locks are taken, the system topology
417 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100418 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100419 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000420 end_afflvl,
421 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100422
423 /* Perform generic, architecture and platform specific handling */
Achin Gupta0959db52013-12-02 17:33:04 +0000424 rc = psci_call_power_on_handlers(mpidr_nodes,
425 start_afflvl,
426 end_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100427 pon_handlers);
James Morrissey40a6f642014-02-10 14:24:36 +0000428 if (rc != PSCI_E_SUCCESS)
429 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100430
431 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000432 * This loop releases the lock corresponding to each affinity level
433 * in the reverse order to which they were acquired.
434 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100435 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000436 end_afflvl,
437 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100438}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000439
440/*******************************************************************************
441 * This function initializes the set of hooks that PSCI invokes as part of power
442 * management operation. The power management hooks are expected to be provided
443 * by the SPD, after it finishes all its initialization
444 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100445void psci_register_spd_pm_hook(const spd_pm_ops_t *pm)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000446{
447 psci_spd_pm = pm;
448}