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Thomas Abrahamd6551a02021-02-16 14:22:41 +05301/*
Rohit Mathewa0dd3072024-02-03 17:22:54 +00002 * Copyright (c) 2021-2024, Arm Limited and Contributors. All rights reserved.
Thomas Abrahamd6551a02021-02-16 14:22:41 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Rohit Mathewa0dd3072024-02-03 17:22:54 +00007#ifndef NRD_DMC620_TZC_REGIONS_H
8#define NRD_DMC620_TZC_REGIONS_H
Thomas Abrahamd6551a02021-02-16 14:22:41 +05309
10#include <drivers/arm/tzc_dmc620.h>
11
12#if SPM_MM
Rohit Mathewaac0c3c2024-02-03 22:16:14 +000013#define NRD_DMC620_TZC_REGIONS_DEF \
Thomas Abrahamd6551a02021-02-16 14:22:41 +053014 { \
15 .region_base = ARM_AP_TZC_DRAM1_BASE, \
16 .region_top = PLAT_SP_IMAGE_NS_BUF_BASE - 1, \
17 .sec_attr = TZC_DMC620_REGION_S_RDWR \
18 }, { \
19 .region_base = PLAT_SP_IMAGE_NS_BUF_BASE, \
20 .region_top = PLAT_ARM_SP_IMAGE_STACK_BASE - 1, \
21 .sec_attr = TZC_DMC620_REGION_S_NS_RDWR \
22 }, { \
23 .region_base = PLAT_ARM_SP_IMAGE_STACK_BASE, \
24 .region_top = ARM_AP_TZC_DRAM1_END, \
25 .sec_attr = TZC_DMC620_REGION_S_RDWR \
26 }
27#else
Rohit Mathewaac0c3c2024-02-03 22:16:14 +000028#define NRD_DMC620_TZC_REGIONS_DEF \
Thomas Abrahamd6551a02021-02-16 14:22:41 +053029 { \
30 .region_base = ARM_AP_TZC_DRAM1_BASE, \
31 .region_top = ARM_AP_TZC_DRAM1_END, \
32 .sec_attr = TZC_DMC620_REGION_S_RDWR \
33 }
34#endif /* SPM_MM */
35
Rohit Mathewa0dd3072024-02-03 17:22:54 +000036#endif /* NRD_DMC620_TZC_REGIONS_H */