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Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +01001/*
Vishnu Banavath2b651ea2022-01-19 18:43:12 +00002 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <plat/arm/common/plat_arm.h>
8
9/*
10 * Return the ROTPK hash in the following ASN.1 structure in DER format:
11 *
12 * AlgorithmIdentifier ::= SEQUENCE {
13 * algorithm OBJECT IDENTIFIER,
14 * parameters ANY DEFINED BY algorithm OPTIONAL
15 * }
16 *
17 * DigestInfo ::= SEQUENCE {
18 * digestAlgorithm AlgorithmIdentifier,
19 * digest OCTET STRING
20 * }
21 *
22 * The function returns 0 on success. Any other value is treated as error by the
23 * Trusted Board Boot. The function also reports extra information related
24 * to the ROTPK in the flags parameter: ROTPK_IS_HASH, ROTPK_NOT_DEPLOYED.
25 *
26 * Refer to the TF-A porting-guide document for more details.
27 */
28int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
29 unsigned int *flags)
30{
31 return arm_get_rotpk_info(cookie, key_ptr, key_len, flags);
32}
Abdellatif El Khlifidef06022021-05-10 12:38:41 +010033
34/*
35 * STUB overriding the non-volatile counter reading.
36 * NV counters are not implemented at this stage of development.
37 * Return: 0 = success
38 */
39int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
40{
David Vinczebfdb7262022-03-03 14:35:51 +010041 *nv_ctr = CORSTONE1000_FW_NVCTR_VAL;
42 return 0;
Abdellatif El Khlifidef06022021-05-10 12:38:41 +010043}
44
45/*
46 * STUB overriding the non-volatile counter updating.
47 * NV counters are not implemented at this stage of development.
48 * Return: 0 = success
49 */
50int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
51{
David Vinczebfdb7262022-03-03 14:35:51 +010052 return 0;
Abdellatif El Khlifidef06022021-05-10 12:38:41 +010053}