blob: 89bce95dedb20c10803f80fb0f7f7898834fe185 [file] [log] [blame]
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +00001#
Manish V Badarkhe173c2962022-05-09 21:55:19 +01002# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
Varun Wadekareea6dc12021-05-04 16:14:09 -07003# Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +00004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8# Default configuration values
Andre Przywarae1cc1302020-03-25 15:50:38 +00009GICV3_SUPPORT_GIC600 ?= 0
Varun Wadekareea6dc12021-05-04 16:14:09 -070010GICV3_SUPPORT_GIC600AE_FMU ?= 0
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000011GICV3_IMPL_GIC600_MULTICHIP ?= 0
12GICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0
Alexei Fedorov19705932020-04-06 19:00:35 +010013GIC_ENABLE_V4_EXTN ?= 0
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010014GIC_EXT_INTID ?= 0
Manish V Badarkhe173c2962022-05-09 21:55:19 +010015GIC600_ERRATA_WA_2384374 ?= ${GICV3_SUPPORT_GIC600}
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000016
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010017GICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000018 drivers/arm/gic/v3/gicv3_helpers.c \
19 drivers/arm/gic/v3/gicdv3_helpers.c \
20 drivers/arm/gic/v3/gicrv3_helpers.c
21
Varun Wadekareea6dc12021-05-04 16:14:09 -070022ifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1)
23GICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \
24 drivers/arm/gic/v3/gic600ae_fmu_helpers.c
25endif
26
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000027ifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0)
28GICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c
29endif
30
Andre Przywarae1cc1302020-03-25 15:50:38 +000031GICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000032ifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1)
33GICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c
34endif
Andre Przywarae1cc1302020-03-25 15:50:38 +000035
36# Set GIC-600 support
37$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600))
38$(eval $(call add_define,GICV3_SUPPORT_GIC600))
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010039
Varun Wadekareea6dc12021-05-04 16:14:09 -070040# Set GIC-600AE FMU support
41$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU))
42$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU))
43
Varun Wadekar61286d22023-03-08 16:47:38 +000044# Set GIC-600 multichip support
45$(eval $(call assert_boolean,GICV3_IMPL_GIC600_MULTICHIP))
46$(eval $(call add_define,GICV3_IMPL_GIC600_MULTICHIP))
47
Alexei Fedorov19705932020-04-06 19:00:35 +010048# Set GICv4 extension
49$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN))
50$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
51
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010052# Set support for extended PPI and SPI range
53$(eval $(call assert_boolean,GIC_EXT_INTID))
54$(eval $(call add_define,GIC_EXT_INTID))
Manish V Badarkhe173c2962022-05-09 21:55:19 +010055
56# Set errata workaround for GIC600/GIC600AE
57$(eval $(call assert_boolean,GIC600_ERRATA_WA_2384374))
58$(eval $(call add_define,GIC600_ERRATA_WA_2384374))