blob: b267ffc45483568eb447a76a67ff263263cc58a2 [file] [log] [blame]
Jacky Bai4d93d1d2020-07-02 14:39:58 +08001#
2# Copyright 2021-2024 NXP
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Translation tables library
8include lib/xlat_tables_v2/xlat_tables.mk
9
10# Include GICv3 driver files
11include drivers/arm/gic/v3/gicv3.mk
12
13PLAT_INCLUDES := -Iplat/imx/imx8ulp/include \
14 -Iplat/imx/common/include \
15 -Iplat/imx/imx8ulp/upower
16
17IMX_GIC_SOURCES := ${GICV3_SOURCES} \
18 plat/common/plat_gicv3.c \
19 plat/common/plat_psci_common.c \
20 plat/imx/common/plat_imx8_gic.c
21
22BL31_SOURCES += plat/imx/common/lpuart_console.S \
23 plat/imx/common/imx8_helpers.S \
24 plat/imx/imx8ulp/imx8ulp_bl31_setup.c \
25 plat/imx/imx8ulp/imx8ulp_psci.c \
Jacky Baiba997cc2021-06-25 09:47:46 +080026 plat/imx/imx8ulp/apd_context.c \
Jacky Bai4d93d1d2020-07-02 14:39:58 +080027 plat/imx/common/imx8_topology.c \
28 plat/imx/common/imx_sip_svc.c \
29 plat/imx/common/imx_sip_handler.c \
30 plat/imx/common/imx_bl31_common.c \
31 plat/common/plat_psci_common.c \
32 lib/cpus/aarch64/cortex_a35.S \
33 drivers/delay_timer/delay_timer.c \
34 drivers/delay_timer/generic_delay_timer.c \
Jacky Bai7ec94512023-09-21 14:01:37 +080035 plat/imx/imx8ulp/xrdc/xrdc_core.c \
Pankaj Gupta862f57a2021-08-04 15:42:51 +053036 plat/imx/imx8ulp/imx8ulp_caam.c \
Jacky Baiba997cc2021-06-25 09:47:46 +080037 plat/imx/imx8ulp/dram.c \
Jacky Bai4d93d1d2020-07-02 14:39:58 +080038 drivers/scmi-msg/base.c \
39 drivers/scmi-msg/entry.c \
40 drivers/scmi-msg/smt.c \
41 drivers/scmi-msg/power_domain.c \
42 drivers/scmi-msg/sensor.c \
43 plat/imx/imx8ulp/scmi/scmi.c \
44 plat/imx/imx8ulp/scmi/scmi_pd.c \
45 plat/imx/imx8ulp/scmi/scmi_sensor.c \
46 plat/imx/imx8ulp/upower/upower_api.c \
47 plat/imx/imx8ulp/upower/upower_hal.c \
48 ${XLAT_TABLES_LIB_SRCS} \
49 ${IMX_GIC_SOURCES}
50
51ifeq ($(findstring clang,$(notdir $(CC))),)
52 TF_CFLAGS_aarch64 += -fno-strict-aliasing
53endif
54
55USE_COHERENT_MEM := 1
56RESET_TO_BL31 := 1
57SEPARATE_NOBITS_REGION := 1
58SEPARATE_RWDATA_REGION := 1
59PROGRAMMABLE_RESET_ADDRESS := 1
60COLD_BOOT_SINGLE_CPU := 1
61BL32_BASE ?= 0xa6000000
62BL32_SIZE ?= 0x2000000
63$(eval $(call add_define,BL32_BASE))
64$(eval $(call add_define,BL32_SIZE))