blob: 7f5a86b06247069f3d6f08534845112936b483cf [file] [log] [blame]
Soby Mathew5e5c2072014-04-07 15:28:55 +01001/*
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +00002 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
Soby Mathew5e5c2072014-04-07 15:28:55 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#include <arch.h>
31#include <asm_macros.S>
32#include <context.h>
Andrew Thoelke8c28fe02014-06-02 11:40:35 +010033#include <cpu_data.h>
Soby Mathew5e5c2072014-04-07 15:28:55 +010034#include <plat_macros.S>
Sandrine Bailleuxaf1ef2b2014-05-27 15:46:07 +010035#include <platform_def.h>
Soby Mathew5e5c2072014-04-07 15:28:55 +010036
Soby Mathewc1adbbc2014-06-25 10:07:40 +010037 .globl report_unhandled_exception
38 .globl report_unhandled_interrupt
39 .globl el3_panic
Soby Mathew5e5c2072014-04-07 15:28:55 +010040
Andrew Thoelke385f4d42014-06-03 11:50:53 +010041#if CRASH_REPORTING
Soby Mathewc1adbbc2014-06-25 10:07:40 +010042#define REG_SIZE 0x8
43
Soby Mathew5e5c2072014-04-07 15:28:55 +010044 /* ------------------------------------------------------
45 * The below section deals with dumping the system state
46 * when an unhandled exception is taken in EL3.
47 * The layout and the names of the registers which will
48 * be dumped during a unhandled exception is given below.
49 * ------------------------------------------------------
50 */
Soby Mathewc1adbbc2014-06-25 10:07:40 +010051.section .rodata.crash_prints, "aS"
52print_spacer:
53 .asciz " =\t\t0x"
Soby Mathew5e5c2072014-04-07 15:28:55 +010054
Soby Mathewc1adbbc2014-06-25 10:07:40 +010055gp_regs:
56 .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\
57 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",\
58 "x16", "x17", "x18", "x19", "x20", "x21", "x22",\
59 "x23", "x24", "x25", "x26", "x27", "x28", "x29", ""
60el3_sys_regs:
61 .asciz "scr_el3", "sctlr_el3", "cptr_el3", "tcr_el3",\
62 "daif", "mair_el3", "spsr_el3", "elr_el3", "ttbr0_el3",\
63 "esr_el3", "far_el3", ""
Soby Mathew5e5c2072014-04-07 15:28:55 +010064
Soby Mathewc1adbbc2014-06-25 10:07:40 +010065non_el3_sys_regs:
66 .asciz "spsr_el1", "elr_el1", "spsr_abt", "spsr_und",\
67 "spsr_irq", "spsr_fiq", "sctlr_el1", "actlr_el1", "cpacr_el1",\
68 "csselr_el1", "sp_el1", "esr_el1", "ttbr0_el1", "ttbr1_el1",\
69 "mair_el1", "amair_el1", "tcr_el1", "tpidr_el1", "tpidr_el0",\
70 "tpidrro_el0", "dacr32_el2", "ifsr32_el2", "par_el1",\
71 "mpidr_el1", "afsr0_el1", "afsr1_el1", "contextidr_el1",\
72 "vbar_el1", "cntp_ctl_el0", "cntp_cval_el0", "cntv_ctl_el0",\
Gerald Lejeune851dc7e2016-03-22 11:11:46 +010073 "cntv_cval_el0", "cntkctl_el1", "fpexc32_el2", "sp_el0",\
74 "isr_el1", ""
Soby Mathew5e5c2072014-04-07 15:28:55 +010075
Soby Mathewc1adbbc2014-06-25 10:07:40 +010076panic_msg:
77 .asciz "PANIC in EL3 at x30 = 0x"
78excpt_msg:
79 .asciz "Unhandled Exception in EL3.\nx30 =\t\t0x"
80intr_excpt_msg:
81 .asciz "Unhandled Interrupt Exception in EL3.\nx30 =\t\t0x"
Soby Mathew5e5c2072014-04-07 15:28:55 +010082
Soby Mathewc1adbbc2014-06-25 10:07:40 +010083 /*
84 * Helper function to print newline to console.
Soby Mathew5e5c2072014-04-07 15:28:55 +010085 */
Soby Mathewc1adbbc2014-06-25 10:07:40 +010086func print_newline
87 mov x0, '\n'
88 b plat_crash_console_putc
Kévin Petita877c252015-03-24 14:03:57 +000089endfunc print_newline
Soby Mathew5e5c2072014-04-07 15:28:55 +010090
Soby Mathewc1adbbc2014-06-25 10:07:40 +010091 /*
92 * Helper function to print from crash buf.
93 * The print loop is controlled by the buf size and
94 * ascii reg name list which is passed in x6. The
95 * function returns the crash buf address in x0.
96 * Clobbers : x0 - x7, sp
97 */
98func size_controlled_print
99 /* Save the lr */
100 mov sp, x30
101 /* load the crash buf address */
102 mrs x7, tpidr_el3
103test_size_list:
104 /* Calculate x5 always as it will be clobbered by asm_print_hex */
105 mrs x5, tpidr_el3
106 add x5, x5, #CPU_DATA_CRASH_BUF_SIZE
107 /* Test whether we have reached end of crash buf */
108 cmp x7, x5
109 b.eq exit_size_print
110 ldrb w4, [x6]
111 /* Test whether we are at end of list */
112 cbz w4, exit_size_print
113 mov x4, x6
114 /* asm_print_str updates x4 to point to next entry in list */
115 bl asm_print_str
116 /* update x6 with the updated list pointer */
117 mov x6, x4
118 adr x4, print_spacer
119 bl asm_print_str
120 ldr x4, [x7], #REG_SIZE
121 bl asm_print_hex
122 bl print_newline
123 b test_size_list
124exit_size_print:
125 mov x30, sp
126 ret
Kévin Petita877c252015-03-24 14:03:57 +0000127endfunc size_controlled_print
Soby Mathew5e5c2072014-04-07 15:28:55 +0100128
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100129 /*
130 * Helper function to store x8 - x15 registers to
131 * the crash buf. The system registers values are
132 * copied to x8 to x15 by the caller which are then
133 * copied to the crash buf by this function.
134 * x0 points to the crash buf. It then calls
135 * size_controlled_print to print to console.
136 * Clobbers : x0 - x7, sp
137 */
138func str_in_crash_buf_print
139 /* restore the crash buf address in x0 */
140 mrs x0, tpidr_el3
141 stp x8, x9, [x0]
142 stp x10, x11, [x0, #REG_SIZE * 2]
143 stp x12, x13, [x0, #REG_SIZE * 4]
144 stp x14, x15, [x0, #REG_SIZE * 6]
145 b size_controlled_print
Kévin Petita877c252015-03-24 14:03:57 +0000146endfunc str_in_crash_buf_print
Soby Mathew5e5c2072014-04-07 15:28:55 +0100147
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100148 /* ------------------------------------------------------
149 * This macro calculates the offset to crash buf from
150 * cpu_data and stores it in tpidr_el3. It also saves x0
151 * and x1 in the crash buf by using sp as a temporary
152 * register.
153 * ------------------------------------------------------
154 */
155 .macro prepare_crash_buf_save_x0_x1
156 /* we can corrupt this reg to free up x0 */
157 mov sp, x0
158 /* tpidr_el3 contains the address to cpu_data structure */
159 mrs x0, tpidr_el3
160 /* Calculate the Crash buffer offset in cpu_data */
161 add x0, x0, #CPU_DATA_CRASH_BUF_OFFSET
162 /* Store crash buffer address in tpidr_el3 */
163 msr tpidr_el3, x0
164 str x1, [x0, #REG_SIZE]
Soby Mathew5e5c2072014-04-07 15:28:55 +0100165 mov x1, sp
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100166 str x1, [x0]
Soby Mathew5e5c2072014-04-07 15:28:55 +0100167 .endm
168
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100169 /* -----------------------------------------------------
170 * This function allows to report a crash (if crash
171 * reporting is enabled) when an unhandled exception
172 * occurs. It prints the CPU state via the crash console
173 * making use of the crash buf. This function will
174 * not return.
175 * -----------------------------------------------------
176 */
177func report_unhandled_exception
178 prepare_crash_buf_save_x0_x1
179 adr x0, excpt_msg
180 mov sp, x0
181 /* This call will not return */
182 b do_crash_reporting
Kévin Petita877c252015-03-24 14:03:57 +0000183endfunc report_unhandled_exception
Soby Mathew5e5c2072014-04-07 15:28:55 +0100184
Soby Mathew5e5c2072014-04-07 15:28:55 +0100185
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100186 /* -----------------------------------------------------
187 * This function allows to report a crash (if crash
188 * reporting is enabled) when an unhandled interrupt
189 * occurs. It prints the CPU state via the crash console
190 * making use of the crash buf. This function will
191 * not return.
192 * -----------------------------------------------------
193 */
194func report_unhandled_interrupt
195 prepare_crash_buf_save_x0_x1
196 adr x0, intr_excpt_msg
197 mov sp, x0
198 /* This call will not return */
199 b do_crash_reporting
Kévin Petita877c252015-03-24 14:03:57 +0000200endfunc report_unhandled_interrupt
Soby Mathew5e5c2072014-04-07 15:28:55 +0100201
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100202 /* -----------------------------------------------------
203 * This function allows to report a crash (if crash
204 * reporting is enabled) when panic() is invoked from
205 * C Runtime. It prints the CPU state via the crash
206 * console making use of the crash buf. This function
207 * will not return.
208 * -----------------------------------------------------
209 */
210func el3_panic
211 msr spsel, #1
212 prepare_crash_buf_save_x0_x1
213 adr x0, panic_msg
214 mov sp, x0
215 /* This call will not return */
216 b do_crash_reporting
Kévin Petita877c252015-03-24 14:03:57 +0000217endfunc el3_panic
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100218
219 /* ------------------------------------------------------------
220 * The common crash reporting functionality. It requires x0
221 * and x1 has already been stored in crash buf, sp points to
222 * crash message and tpidr_el3 contains the crash buf address.
223 * The function does the following:
224 * - Retrieve the crash buffer from tpidr_el3
225 * - Store x2 to x6 in the crash buffer
226 * - Initialise the crash console.
227 * - Print the crash message by using the address in sp.
228 * - Print x30 value to the crash console.
229 * - Print x0 - x7 from the crash buf to the crash console.
230 * - Print x8 - x29 (in groups of 8 registers) using the
231 * crash buf to the crash console.
232 * - Print el3 sys regs (in groups of 8 registers) using the
233 * crash buf to the crash console.
234 * - Print non el3 sys regs (in groups of 8 registers) using
235 * the crash buf to the crash console.
236 * ------------------------------------------------------------
237 */
238func do_crash_reporting
239 /* Retrieve the crash buf from tpidr_el3 */
240 mrs x0, tpidr_el3
241 /* Store x2 - x6, x30 in the crash buffer */
242 stp x2, x3, [x0, #REG_SIZE * 2]
243 stp x4, x5, [x0, #REG_SIZE * 4]
244 stp x6, x30, [x0, #REG_SIZE * 6]
245 /* Initialize the crash console */
246 bl plat_crash_console_init
247 /* Verify the console is initialized */
248 cbz x0, crash_panic
249 /* Print the crash message. sp points to the crash message */
250 mov x4, sp
251 bl asm_print_str
252 /* load the crash buf address */
253 mrs x0, tpidr_el3
254 /* report x30 first from the crash buf */
255 ldr x4, [x0, #REG_SIZE * 7]
256 bl asm_print_hex
257 bl print_newline
258 /* Load the crash buf address */
259 mrs x0, tpidr_el3
260 /* Now mov x7 into crash buf */
261 str x7, [x0, #REG_SIZE * 7]
Soby Mathew5e5c2072014-04-07 15:28:55 +0100262
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100263 /* Report x0 - x29 values stored in crash buf*/
264 /* Store the ascii list pointer in x6 */
265 adr x6, gp_regs
266 /* Print x0 to x7 from the crash buf */
267 bl size_controlled_print
268 /* Store x8 - x15 in crash buf and print */
269 bl str_in_crash_buf_print
270 /* Load the crash buf address */
271 mrs x0, tpidr_el3
272 /* Store the rest of gp regs and print */
273 stp x16, x17, [x0]
274 stp x18, x19, [x0, #REG_SIZE * 2]
275 stp x20, x21, [x0, #REG_SIZE * 4]
276 stp x22, x23, [x0, #REG_SIZE * 6]
277 bl size_controlled_print
278 /* Load the crash buf address */
279 mrs x0, tpidr_el3
280 stp x24, x25, [x0]
281 stp x26, x27, [x0, #REG_SIZE * 2]
282 stp x28, x29, [x0, #REG_SIZE * 4]
283 bl size_controlled_print
Soby Mathew5e5c2072014-04-07 15:28:55 +0100284
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100285 /* Print the el3 sys registers */
286 adr x6, el3_sys_regs
287 mrs x8, scr_el3
288 mrs x9, sctlr_el3
289 mrs x10, cptr_el3
290 mrs x11, tcr_el3
291 mrs x12, daif
292 mrs x13, mair_el3
293 mrs x14, spsr_el3
294 mrs x15, elr_el3
295 bl str_in_crash_buf_print
296 mrs x8, ttbr0_el3
297 mrs x9, esr_el3
298 mrs x10, far_el3
299 bl str_in_crash_buf_print
Soby Mathew5e5c2072014-04-07 15:28:55 +0100300
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100301 /* Print the non el3 sys registers */
302 adr x6, non_el3_sys_regs
303 mrs x8, spsr_el1
304 mrs x9, elr_el1
305 mrs x10, spsr_abt
306 mrs x11, spsr_und
307 mrs x12, spsr_irq
308 mrs x13, spsr_fiq
309 mrs x14, sctlr_el1
310 mrs x15, actlr_el1
311 bl str_in_crash_buf_print
312 mrs x8, cpacr_el1
313 mrs x9, csselr_el1
Soby Mathew5e5c2072014-04-07 15:28:55 +0100314 mrs x10, sp_el1
315 mrs x11, esr_el1
316 mrs x12, ttbr0_el1
317 mrs x13, ttbr1_el1
318 mrs x14, mair_el1
319 mrs x15, amair_el1
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100320 bl str_in_crash_buf_print
321 mrs x8, tcr_el1
322 mrs x9, tpidr_el1
323 mrs x10, tpidr_el0
324 mrs x11, tpidrro_el0
325 mrs x12, dacr32_el2
326 mrs x13, ifsr32_el2
327 mrs x14, par_el1
328 mrs x15, mpidr_el1
329 bl str_in_crash_buf_print
330 mrs x8, afsr0_el1
331 mrs x9, afsr1_el1
332 mrs x10, contextidr_el1
333 mrs x11, vbar_el1
334 mrs x12, cntp_ctl_el0
335 mrs x13, cntp_cval_el0
336 mrs x14, cntv_ctl_el0
337 mrs x15, cntv_cval_el0
338 bl str_in_crash_buf_print
339 mrs x8, cntkctl_el1
340 mrs x9, fpexc32_el2
341 mrs x10, sp_el0
Gerald Lejeune851dc7e2016-03-22 11:11:46 +0100342 mrs x11, isr_el1
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100343 bl str_in_crash_buf_print
Soby Mathew5e5c2072014-04-07 15:28:55 +0100344
Soby Mathew38b4bc92014-08-14 13:36:41 +0100345 /* Get the cpu specific registers to report */
346 bl do_cpu_reg_dump
347 bl str_in_crash_buf_print
Soby Mathew0da95932014-07-16 09:23:52 +0100348
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +0100349 /* Print some platform registers */
350 plat_crash_print_regs
Soby Mathew0da95932014-07-16 09:23:52 +0100351
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100352 /* Done reporting */
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +0000353 bl plat_panic_handler
Kévin Petita877c252015-03-24 14:03:57 +0000354endfunc do_crash_reporting
Soby Mathew5e5c2072014-04-07 15:28:55 +0100355
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100356#else /* CRASH_REPORTING */
357func report_unhandled_exception
358report_unhandled_interrupt:
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +0000359 bl plat_panic_handler
Kévin Petita877c252015-03-24 14:03:57 +0000360endfunc report_unhandled_exception
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000361#endif /* CRASH_REPORTING */
Soby Mathew5e5c2072014-04-07 15:28:55 +0100362
Soby Mathew5e5c2072014-04-07 15:28:55 +0100363
Soby Mathewc1adbbc2014-06-25 10:07:40 +0100364func crash_panic
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +0000365 bl plat_panic_handler
366endfunc crash_panic