blob: f7910de6c6bafafd2f467b6069f475a39cd0837c [file] [log] [blame]
Prasad Kummari2038bd62023-12-14 10:52:24 +05301/*
2 * Copyright (c) 2023-2024, Advanced Micro Devices, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <common/debug.h>
Prasad Kummariaf636182023-12-20 11:01:24 +05307#include <lib/mmio.h>
Prasad Kummari2038bd62023-12-14 10:52:24 +05308#include <plat/common/platform.h>
9
10#include <platform_def.h>
Maheedhar Bollapalli86d6d702024-10-07 09:27:58 +000011#include <plat_clkfunc.h>
Prasad Kummari2038bd62023-12-14 10:52:24 +053012#include <plat_private.h>
13
Prasad Kummariaf636182023-12-20 11:01:24 +053014uint32_t plat_get_syscnt_freq2(void)
15{
16 uint32_t counter_freq = 0;
17 uint32_t ret = 0;
18
19 counter_freq = mmio_read_32(IOU_SCNTRS_BASE +
20 IOU_SCNTRS_BASE_FREQ_OFFSET);
21 if (counter_freq != 0U) {
22 ret = counter_freq;
23 } else {
24 INFO("Indicates counter frequency %dHz setting to %dHz\n",
25 counter_freq, cpu_clock);
26 ret = cpu_clock;
27 }
28
29 return ret;
30}
31
Prasad Kummari2038bd62023-12-14 10:52:24 +053032void set_cnt_freq(void)
33{
34 uint64_t counter_freq;
35
36 /* Configure counter frequency */
37 counter_freq = read_cntfrq_el0();
38 if (counter_freq == 0U) {
39 write_cntfrq_el0(plat_get_syscnt_freq2());
40 }
41}