| developer | b7f3f13 | 2024-10-21 14:22:19 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2024, Mediatek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef ARCH_DEF_H |
| 8 | #define ARCH_DEF_H |
| 9 | |
| 10 | #include <arch.h> |
| 11 | |
| 12 | /* Topology constants */ |
| 13 | #ifndef PLAT_MAX_PWR_LVL |
| 14 | #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 |
| 15 | #endif |
| 16 | #define PLAT_MAX_RET_STATE MPIDR_AFFLVL1 |
| 17 | |
| 18 | #ifndef PLAT_MAX_OFF_STATE |
| 19 | #define PLAT_MAX_OFF_STATE MPIDR_AFFLVL2 |
| 20 | #endif |
| 21 | |
| 22 | #define PLATFORM_SYSTEM_COUNT 1 |
| 23 | #define PLATFORM_CLUSTER_COUNT 1 |
| 24 | #define PLATFORM_CLUSTER0_CORE_COUNT 8 |
| 25 | #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) |
| 26 | #define PLATFORM_MAX_CPUS_PER_CLUSTER 8 |
| 27 | #define PLATFORM_NUM_AFFS (PLATFORM_SYSTEM_COUNT + \ |
| 28 | PLATFORM_CLUSTER_COUNT + \ |
| 29 | PLATFORM_CORE_COUNT) |
| 30 | |
| 31 | /* Cachline size */ |
| 32 | #define CACHE_WRITEBACK_SHIFT 6 |
| 33 | #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) |
| 34 | #endif /* ARCH_DEF_H */ |