blob: f6dbb97e37494fe58a65c508418d39014ff2ec4f [file] [log] [blame]
Achin Gupta86f23532019-10-11 15:41:16 +01001/*
2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <errno.h>
9#include <string.h>
10
11#include <arch_helpers.h>
Olivier Deprez2bae35f2020-04-16 13:39:06 +020012#include <arch/aarch64/arch_features.h>
Achin Gupta86f23532019-10-11 15:41:16 +010013#include <bl31/bl31.h>
14#include <common/debug.h>
15#include <common/runtime_svc.h>
16#include <lib/el3_runtime/context_mgmt.h>
17#include <lib/smccc.h>
18#include <lib/spinlock.h>
19#include <lib/utils.h>
20#include <lib/xlat_tables/xlat_tables_v2.h>
21#include <plat/common/common_def.h>
22#include <plat/common/platform.h>
23#include <platform_def.h>
24#include <services/spci_svc.h>
25#include <services/spmd_svc.h>
26#include <smccc_helpers.h>
27#include "spmd_private.h"
28
29/*******************************************************************************
30 * SPM Core context information.
31 ******************************************************************************/
Olivier Deprez2bae35f2020-04-16 13:39:06 +020032static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT];
Achin Gupta86f23532019-10-11 15:41:16 +010033
34/*******************************************************************************
35 * SPM Core attribute information read from its manifest.
36 ******************************************************************************/
Olivier Deprez2bae35f2020-04-16 13:39:06 +020037static spmc_manifest_attribute_t spmc_attrs;
Achin Gupta86f23532019-10-11 15:41:16 +010038
39/*******************************************************************************
Max Shvetsov745889c2020-02-27 14:54:21 +000040 * SPM Core entry point information. Discovered on the primary core and reused
41 * on secondary cores.
42 ******************************************************************************/
43static entry_point_info_t *spmc_ep_info;
44
45/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +020046 * SPM Core context on current CPU get helper.
47 ******************************************************************************/
48spmd_spm_core_context_t *spmd_get_context(void)
49{
50 unsigned int linear_id = plat_my_core_pos();
51
52 return &spm_core_context[linear_id];
53}
54
55/*******************************************************************************
Max Shvetsov745889c2020-02-27 14:54:21 +000056 * Static function declaration.
57 ******************************************************************************/
Olivier Deprez2bae35f2020-04-16 13:39:06 +020058static int32_t spmd_init(void);
59static int spmd_spmc_init(void *rd_base,
60 size_t rd_size);
61static uint64_t spmd_spci_error_return(void *handle,
62 int error_code);
63static uint64_t spmd_smc_forward(uint32_t smc_fid,
64 bool secure_origin,
65 uint64_t x1,
66 uint64_t x2,
67 uint64_t x3,
68 uint64_t x4,
69 void *handle);
Max Shvetsov745889c2020-02-27 14:54:21 +000070
71/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +020072 * This function takes an SPMC context pointer and performs a synchronous
73 * SPMC entry.
Achin Gupta86f23532019-10-11 15:41:16 +010074 ******************************************************************************/
75uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx)
76{
77 uint64_t rc;
78
79 assert(spmc_ctx != NULL);
80
81 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE);
82
83 /* Restore the context assigned above */
84 cm_el1_sysregs_context_restore(SECURE);
Max Shvetsove7fd80e2020-02-25 13:55:00 +000085#if SPMD_SPM_AT_SEL2
Max Shvetsovbdf502d2020-02-25 13:56:19 +000086 cm_el2_sysregs_context_restore(SECURE);
Max Shvetsove7fd80e2020-02-25 13:55:00 +000087#endif
Achin Gupta86f23532019-10-11 15:41:16 +010088 cm_set_next_eret_context(SECURE);
89
Max Shvetsove7fd80e2020-02-25 13:55:00 +000090 /* Enter SPMC */
Achin Gupta86f23532019-10-11 15:41:16 +010091 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx);
92
93 /* Save secure state */
94 cm_el1_sysregs_context_save(SECURE);
Max Shvetsove7fd80e2020-02-25 13:55:00 +000095#if SPMD_SPM_AT_SEL2
Max Shvetsovbdf502d2020-02-25 13:56:19 +000096 cm_el2_sysregs_context_save(SECURE);
Max Shvetsove7fd80e2020-02-25 13:55:00 +000097#endif
Achin Gupta86f23532019-10-11 15:41:16 +010098
99 return rc;
100}
101
102/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200103 * This function returns to the place where spmd_spm_core_sync_entry() was
Achin Gupta86f23532019-10-11 15:41:16 +0100104 * called originally.
105 ******************************************************************************/
106__dead2 void spmd_spm_core_sync_exit(uint64_t rc)
107{
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200108 spmd_spm_core_context_t *ctx = spmd_get_context();
Achin Gupta86f23532019-10-11 15:41:16 +0100109
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200110 /* Get current CPU context from SPMC context */
Achin Gupta86f23532019-10-11 15:41:16 +0100111 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx));
112
113 /*
114 * The SPMD must have initiated the original request through a
115 * synchronous entry into SPMC. Jump back to the original C runtime
116 * context with the value of rc in x0;
117 */
118 spmd_spm_core_exit(ctx->c_rt_ctx, rc);
119
120 panic();
121}
122
123/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200124 * Jump to the SPM Core for the first time.
Achin Gupta86f23532019-10-11 15:41:16 +0100125 ******************************************************************************/
126static int32_t spmd_init(void)
127{
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200128 spmd_spm_core_context_t *ctx = spmd_get_context();
129 uint64_t rc;
Achin Gupta86f23532019-10-11 15:41:16 +0100130
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200131 VERBOSE("SPM Core init start.\n");
Achin Gupta86f23532019-10-11 15:41:16 +0100132 ctx->state = SPMC_STATE_RESET;
133
134 rc = spmd_spm_core_sync_entry(ctx);
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200135 if (rc != 0ULL) {
Achin Gupta86f23532019-10-11 15:41:16 +0100136 ERROR("SPMC initialisation failed 0x%llx\n", rc);
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200137 return 0;
Achin Gupta86f23532019-10-11 15:41:16 +0100138 }
139
140 ctx->state = SPMC_STATE_IDLE;
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200141 VERBOSE("SPM Core init end.\n");
Achin Gupta86f23532019-10-11 15:41:16 +0100142
143 return 1;
144}
145
146/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200147 * Loads SPMC manifest and inits SPMC.
Achin Gupta86f23532019-10-11 15:41:16 +0100148 ******************************************************************************/
Max Shvetsov745889c2020-02-27 14:54:21 +0000149static int spmd_spmc_init(void *rd_base, size_t rd_size)
Achin Gupta86f23532019-10-11 15:41:16 +0100150{
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200151 spmd_spm_core_context_t *spm_ctx = spmd_get_context();
Achin Gupta86f23532019-10-11 15:41:16 +0100152 uint32_t ep_attr;
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200153 int rc;
Achin Gupta86f23532019-10-11 15:41:16 +0100154
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200155 /* Load the SPM Core manifest */
Achin Gupta86f23532019-10-11 15:41:16 +0100156 rc = plat_spm_core_manifest_load(&spmc_attrs, rd_base, rd_size);
Max Shvetsov745889c2020-02-27 14:54:21 +0000157 if (rc != 0) {
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200158 WARN("No or invalid SPM Core manifest image provided by BL2\n");
159 return rc;
Achin Gupta86f23532019-10-11 15:41:16 +0100160 }
161
162 /*
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200163 * Ensure that the SPM Core version is compatible with the SPM
164 * Dispatcher version.
Achin Gupta86f23532019-10-11 15:41:16 +0100165 */
166 if ((spmc_attrs.major_version != SPCI_VERSION_MAJOR) ||
167 (spmc_attrs.minor_version > SPCI_VERSION_MINOR)) {
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200168 WARN("Unsupported SPCI version (%u.%u)\n",
Achin Gupta86f23532019-10-11 15:41:16 +0100169 spmc_attrs.major_version, spmc_attrs.minor_version);
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200170 return -EINVAL;
Achin Gupta86f23532019-10-11 15:41:16 +0100171 }
172
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200173 VERBOSE("SPCI version (%u.%u).\n", spmc_attrs.major_version,
Achin Gupta86f23532019-10-11 15:41:16 +0100174 spmc_attrs.minor_version);
175
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200176 VERBOSE("SPM Core run time EL%x.\n",
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000177 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1);
Achin Gupta86f23532019-10-11 15:41:16 +0100178
Max Shvetsove79062e2020-03-12 15:16:40 +0000179 /* Validate the SPMC ID, Ensure high bit is set */
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200180 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) &
181 SPMC_SECURE_ID_MASK) == 0U) {
182 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id);
183 return -EINVAL;
Max Shvetsove79062e2020-03-12 15:16:40 +0000184 }
185
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200186 /* Validate the SPM Core execution state */
Achin Gupta86f23532019-10-11 15:41:16 +0100187 if ((spmc_attrs.exec_state != MODE_RW_64) &&
188 (spmc_attrs.exec_state != MODE_RW_32)) {
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200189 WARN("Unsupported SPM Core execution state 0x%x.\n",
Achin Gupta86f23532019-10-11 15:41:16 +0100190 spmc_attrs.exec_state);
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200191 return -EINVAL;
Achin Gupta86f23532019-10-11 15:41:16 +0100192 }
193
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200194 VERBOSE("SPM Core execution state 0x%x.\n", spmc_attrs.exec_state);
Achin Gupta86f23532019-10-11 15:41:16 +0100195
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000196#if SPMD_SPM_AT_SEL2
197 /* Ensure manifest has not requested AArch32 state in S-EL2 */
198 if (spmc_attrs.exec_state == MODE_RW_32) {
199 WARN("AArch32 state at S-EL2 is not supported.\n");
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200200 return -EINVAL;
Achin Gupta86f23532019-10-11 15:41:16 +0100201 }
202
203 /*
204 * Check if S-EL2 is supported on this system if S-EL2
205 * is required for SPM
206 */
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200207 if (!is_armv8_4_sel2_present()) {
208 WARN("SPM Core run time S-EL2 is not supported.\n");
209 return -EINVAL;
Achin Gupta86f23532019-10-11 15:41:16 +0100210 }
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000211#endif /* SPMD_SPM_AT_SEL2 */
Achin Gupta86f23532019-10-11 15:41:16 +0100212
213 /* Initialise an entrypoint to set up the CPU context */
214 ep_attr = SECURE | EP_ST_ENABLE;
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200215 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) {
Achin Gupta86f23532019-10-11 15:41:16 +0100216 ep_attr |= EP_EE_BIG;
Max Shvetsov745889c2020-02-27 14:54:21 +0000217 }
218
Achin Gupta86f23532019-10-11 15:41:16 +0100219 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr);
220 assert(spmc_ep_info->pc == BL32_BASE);
221
222 /*
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200223 * Populate SPSR for SPM Core based upon validated parameters from the
224 * manifest.
Achin Gupta86f23532019-10-11 15:41:16 +0100225 */
226 if (spmc_attrs.exec_state == MODE_RW_32) {
227 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
228 SPSR_E_LITTLE,
229 DAIF_FIQ_BIT |
230 DAIF_IRQ_BIT |
231 DAIF_ABT_BIT);
232 } else {
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000233
234#if SPMD_SPM_AT_SEL2
235 static const uint32_t runtime_el = MODE_EL2;
236#else
237 static const uint32_t runtime_el = MODE_EL1;
238#endif
239 spmc_ep_info->spsr = SPSR_64(runtime_el,
Achin Gupta86f23532019-10-11 15:41:16 +0100240 MODE_SP_ELX,
241 DISABLE_ALL_EXCEPTIONS);
242 }
243
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200244 /* Initialise SPM Core context with this entry point information */
Max Shvetsov745889c2020-02-27 14:54:21 +0000245 cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info);
246
247 /* Reuse PSCI affinity states to mark this SPMC context as off */
248 spm_ctx->state = AFF_STATE_OFF;
Achin Gupta86f23532019-10-11 15:41:16 +0100249
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200250 INFO("SPM Core setup done.\n");
Achin Gupta86f23532019-10-11 15:41:16 +0100251
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200252 /* Register init function for deferred init. */
Achin Gupta86f23532019-10-11 15:41:16 +0100253 bl31_register_bl32_init(&spmd_init);
254
255 return 0;
Max Shvetsov745889c2020-02-27 14:54:21 +0000256}
Achin Gupta86f23532019-10-11 15:41:16 +0100257
Max Shvetsov745889c2020-02-27 14:54:21 +0000258/*******************************************************************************
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200259 * Initialize context of SPM Core.
Max Shvetsov745889c2020-02-27 14:54:21 +0000260 ******************************************************************************/
261int spmd_setup(void)
262{
263 int rc;
264 void *rd_base;
265 size_t rd_size;
266 uintptr_t rd_base_align;
267 uintptr_t rd_size_align;
Achin Gupta86f23532019-10-11 15:41:16 +0100268
Max Shvetsov745889c2020-02-27 14:54:21 +0000269 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200270 if (spmc_ep_info == NULL) {
271 WARN("No SPM Core image provided by BL2 boot loader.\n");
272 return -EINVAL;
Max Shvetsov745889c2020-02-27 14:54:21 +0000273 }
274
275 /* Under no circumstances will this parameter be 0 */
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200276 assert(spmc_ep_info->pc != 0ULL);
Max Shvetsov745889c2020-02-27 14:54:21 +0000277
278 /*
279 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200280 * be used as a manifest for the SPM Core at the next lower EL/mode.
Max Shvetsov745889c2020-02-27 14:54:21 +0000281 */
282 if (spmc_ep_info->args.arg0 == 0U || spmc_ep_info->args.arg2 == 0U) {
283 ERROR("Invalid or absent SPM core manifest\n");
Achin Gupta86f23532019-10-11 15:41:16 +0100284 panic();
285 }
286
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200287 /* Obtain whereabouts of SPM Core manifest */
Max Shvetsov745889c2020-02-27 14:54:21 +0000288 rd_base = (void *) spmc_ep_info->args.arg0;
289 rd_size = spmc_ep_info->args.arg2;
290
291 rd_base_align = page_align((uintptr_t) rd_base, DOWN);
292 rd_size_align = page_align((uintptr_t) rd_size, UP);
293
294 /* Map the manifest in the SPMD translation regime first */
295 VERBOSE("SPM core manifest base : 0x%lx\n", rd_base_align);
296 VERBOSE("SPM core manifest size : 0x%lx\n", rd_size_align);
297 rc = mmap_add_dynamic_region((unsigned long long) rd_base_align,
298 (uintptr_t) rd_base_align,
299 rd_size_align,
300 MT_RO_DATA);
301 if (rc != 0) {
302 ERROR("Error while mapping SPM core manifest (%d).\n", rc);
303 panic();
304 }
305
306 /* Load manifest, init SPMC */
307 rc = spmd_spmc_init(rd_base, rd_size);
308 if (rc != 0) {
309 int mmap_rc;
310
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200311 WARN("Booting device without SPM initialization.\n");
Max Shvetsov745889c2020-02-27 14:54:21 +0000312
313 mmap_rc = mmap_remove_dynamic_region(rd_base_align,
314 rd_size_align);
315 if (mmap_rc != 0) {
316 ERROR("Error while unmapping SPM core manifest (%d).\n",
317 mmap_rc);
318 panic();
319 }
320
321 return rc;
322 }
323
324 return 0;
325}
326
327/*******************************************************************************
328 * Forward SMC to the other security state
329 ******************************************************************************/
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200330static uint64_t spmd_smc_forward(uint32_t smc_fid,
331 bool secure_origin,
332 uint64_t x1,
333 uint64_t x2,
334 uint64_t x3,
335 uint64_t x4,
336 void *handle)
Max Shvetsov745889c2020-02-27 14:54:21 +0000337{
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100338 uint32_t secure_state_in = (secure_origin) ? SECURE : NON_SECURE;
339 uint32_t secure_state_out = (!secure_origin) ? SECURE : NON_SECURE;
340
Max Shvetsov745889c2020-02-27 14:54:21 +0000341 /* Save incoming security state */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100342 cm_el1_sysregs_context_save(secure_state_in);
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000343#if SPMD_SPM_AT_SEL2
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100344 cm_el2_sysregs_context_save(secure_state_in);
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000345#endif
Max Shvetsov745889c2020-02-27 14:54:21 +0000346
347 /* Restore outgoing security state */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100348 cm_el1_sysregs_context_restore(secure_state_out);
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000349#if SPMD_SPM_AT_SEL2
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100350 cm_el2_sysregs_context_restore(secure_state_out);
Max Shvetsove7fd80e2020-02-25 13:55:00 +0000351#endif
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100352 cm_set_next_eret_context(secure_state_out);
Max Shvetsov745889c2020-02-27 14:54:21 +0000353
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100354 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4,
Max Shvetsov745889c2020-02-27 14:54:21 +0000355 SMC_GET_GP(handle, CTX_GPREG_X5),
356 SMC_GET_GP(handle, CTX_GPREG_X6),
357 SMC_GET_GP(handle, CTX_GPREG_X7));
358}
359
360/*******************************************************************************
361 * Return SPCI_ERROR with specified error code
362 ******************************************************************************/
363static uint64_t spmd_spci_error_return(void *handle, int error_code)
364{
365 SMC_RET8(handle, SPCI_ERROR,
366 SPCI_TARGET_INFO_MBZ, error_code,
367 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
368 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ);
Achin Gupta86f23532019-10-11 15:41:16 +0100369}
370
371/*******************************************************************************
372 * This function handles all SMCs in the range reserved for SPCI. Each call is
373 * either forwarded to the other security state or handled by the SPM dispatcher
374 ******************************************************************************/
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200375uint64_t spmd_smc_handler(uint32_t smc_fid,
376 uint64_t x1,
377 uint64_t x2,
378 uint64_t x3,
379 uint64_t x4,
380 void *cookie,
381 void *handle,
Achin Gupta86f23532019-10-11 15:41:16 +0100382 uint64_t flags)
383{
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200384 spmd_spm_core_context_t *ctx = spmd_get_context();
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100385 bool secure_origin;
386 int32_t ret;
Achin Gupta86f23532019-10-11 15:41:16 +0100387
388 /* Determine which security state this SMC originated from */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100389 secure_origin = is_caller_secure(flags);
Achin Gupta86f23532019-10-11 15:41:16 +0100390
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200391 INFO("SPM: 0x%x 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx\n",
Achin Gupta86f23532019-10-11 15:41:16 +0100392 smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5),
393 SMC_GET_GP(handle, CTX_GPREG_X6),
394 SMC_GET_GP(handle, CTX_GPREG_X7));
395
396 switch (smc_fid) {
397 case SPCI_ERROR:
398 /*
399 * Check if this is the first invocation of this interface on
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200400 * this CPU. If so, then indicate that the SPM Core initialised
Achin Gupta86f23532019-10-11 15:41:16 +0100401 * unsuccessfully.
402 */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100403 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) {
Achin Gupta86f23532019-10-11 15:41:16 +0100404 spmd_spm_core_sync_exit(x2);
Max Shvetsov745889c2020-02-27 14:54:21 +0000405 }
Achin Gupta86f23532019-10-11 15:41:16 +0100406
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100407 return spmd_smc_forward(smc_fid, secure_origin,
Max Shvetsov745889c2020-02-27 14:54:21 +0000408 x1, x2, x3, x4, handle);
Achin Gupta86f23532019-10-11 15:41:16 +0100409 break; /* not reached */
410
411 case SPCI_VERSION:
412 /*
413 * TODO: This is an optimization that the version information
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200414 * provided by the SPM Core manifest is returned by the SPM
Achin Gupta86f23532019-10-11 15:41:16 +0100415 * dispatcher. It might be a better idea to simply forward this
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200416 * call to the SPM Core and wash our hands completely.
Achin Gupta86f23532019-10-11 15:41:16 +0100417 */
418 ret = MAKE_SPCI_VERSION(spmc_attrs.major_version,
419 spmc_attrs.minor_version);
420 SMC_RET8(handle, SPCI_SUCCESS_SMC32, SPCI_TARGET_INFO_MBZ, ret,
421 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
422 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ);
423 break; /* not reached */
424
425 case SPCI_FEATURES:
426 /*
427 * This is an optional interface. Do the minimal checks and
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200428 * forward to SPM Core which will handle it if implemented.
Achin Gupta86f23532019-10-11 15:41:16 +0100429 */
430
431 /*
Max Shvetsov745889c2020-02-27 14:54:21 +0000432 * Check if x1 holds a valid SPCI fid. This is an
Achin Gupta86f23532019-10-11 15:41:16 +0100433 * optimization.
434 */
Max Shvetsov745889c2020-02-27 14:54:21 +0000435 if (!is_spci_fid(x1)) {
436 return spmd_spci_error_return(handle,
437 SPCI_ERROR_NOT_SUPPORTED);
438 }
Achin Gupta86f23532019-10-11 15:41:16 +0100439
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200440 /* Forward SMC from Normal world to the SPM Core */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100441 if (!secure_origin) {
442 return spmd_smc_forward(smc_fid, secure_origin,
Max Shvetsov745889c2020-02-27 14:54:21 +0000443 x1, x2, x3, x4, handle);
Achin Gupta86f23532019-10-11 15:41:16 +0100444 }
Max Shvetsov745889c2020-02-27 14:54:21 +0000445
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200446 /*
447 * Return success if call was from secure world i.e. all
448 * SPCI functions are supported. This is essentially a
449 * nop.
450 */
451 SMC_RET8(handle, SPCI_SUCCESS_SMC32, x1, x2, x3, x4,
452 SMC_GET_GP(handle, CTX_GPREG_X5),
453 SMC_GET_GP(handle, CTX_GPREG_X6),
454 SMC_GET_GP(handle, CTX_GPREG_X7));
455
Achin Gupta86f23532019-10-11 15:41:16 +0100456 break; /* not reached */
457
Max Shvetsove79062e2020-03-12 15:16:40 +0000458 case SPCI_ID_GET:
459 /*
460 * Returns the ID of the calling SPCI component.
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200461 */
Max Shvetsove79062e2020-03-12 15:16:40 +0000462 if (!secure_origin) {
463 SMC_RET8(handle, SPCI_SUCCESS_SMC32,
464 SPCI_TARGET_INFO_MBZ, SPCI_NS_ENDPOINT_ID,
465 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
466 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
467 SPCI_PARAM_MBZ);
Max Shvetsove79062e2020-03-12 15:16:40 +0000468 }
469
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200470 SMC_RET8(handle, SPCI_SUCCESS_SMC32,
471 SPCI_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
472 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
473 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
474 SPCI_PARAM_MBZ);
475
Max Shvetsove79062e2020-03-12 15:16:40 +0000476 break; /* not reached */
477
Achin Gupta86f23532019-10-11 15:41:16 +0100478 case SPCI_RX_RELEASE:
479 case SPCI_RXTX_MAP_SMC32:
480 case SPCI_RXTX_MAP_SMC64:
481 case SPCI_RXTX_UNMAP:
482 case SPCI_MSG_RUN:
483 /* This interface must be invoked only by the Normal world */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100484 if (secure_origin) {
Max Shvetsov745889c2020-02-27 14:54:21 +0000485 return spmd_spci_error_return(handle,
486 SPCI_ERROR_NOT_SUPPORTED);
Achin Gupta86f23532019-10-11 15:41:16 +0100487 }
488
489 /* Fall through to forward the call to the other world */
490
491 case SPCI_PARTITION_INFO_GET:
492 case SPCI_MSG_SEND:
493 case SPCI_MSG_SEND_DIRECT_REQ_SMC32:
494 case SPCI_MSG_SEND_DIRECT_REQ_SMC64:
495 case SPCI_MSG_SEND_DIRECT_RESP_SMC32:
496 case SPCI_MSG_SEND_DIRECT_RESP_SMC64:
497 case SPCI_MEM_DONATE_SMC32:
498 case SPCI_MEM_DONATE_SMC64:
499 case SPCI_MEM_LEND_SMC32:
500 case SPCI_MEM_LEND_SMC64:
501 case SPCI_MEM_SHARE_SMC32:
502 case SPCI_MEM_SHARE_SMC64:
503 case SPCI_MEM_RETRIEVE_REQ_SMC32:
504 case SPCI_MEM_RETRIEVE_REQ_SMC64:
505 case SPCI_MEM_RETRIEVE_RESP:
506 case SPCI_MEM_RELINQUISH:
507 case SPCI_MEM_RECLAIM:
508 case SPCI_SUCCESS_SMC32:
509 case SPCI_SUCCESS_SMC64:
510 /*
511 * TODO: Assume that no requests originate from EL3 at the
512 * moment. This will change if a SP service is required in
513 * response to secure interrupts targeted to EL3. Until then
514 * simply forward the call to the Normal world.
515 */
516
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100517 return spmd_smc_forward(smc_fid, secure_origin,
Max Shvetsov745889c2020-02-27 14:54:21 +0000518 x1, x2, x3, x4, handle);
Achin Gupta86f23532019-10-11 15:41:16 +0100519 break; /* not reached */
520
521 case SPCI_MSG_WAIT:
522 /*
523 * Check if this is the first invocation of this interface on
524 * this CPU from the Secure world. If so, then indicate that the
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200525 * SPM Core initialised successfully.
Achin Gupta86f23532019-10-11 15:41:16 +0100526 */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100527 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) {
Achin Gupta86f23532019-10-11 15:41:16 +0100528 spmd_spm_core_sync_exit(0);
529 }
530
Max Shvetsov745889c2020-02-27 14:54:21 +0000531 /* Fall through to forward the call to the other world */
Achin Gupta86f23532019-10-11 15:41:16 +0100532
533 case SPCI_MSG_YIELD:
534 /* This interface must be invoked only by the Secure world */
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100535 if (!secure_origin) {
Max Shvetsov745889c2020-02-27 14:54:21 +0000536 return spmd_spci_error_return(handle,
537 SPCI_ERROR_NOT_SUPPORTED);
Achin Gupta86f23532019-10-11 15:41:16 +0100538 }
539
Olivier Deprez41ff36a2019-12-23 16:21:12 +0100540 return spmd_smc_forward(smc_fid, secure_origin,
Max Shvetsov745889c2020-02-27 14:54:21 +0000541 x1, x2, x3, x4, handle);
Achin Gupta86f23532019-10-11 15:41:16 +0100542 break; /* not reached */
543
544 default:
545 WARN("SPM: Unsupported call 0x%08x\n", smc_fid);
Max Shvetsov745889c2020-02-27 14:54:21 +0000546 return spmd_spci_error_return(handle, SPCI_ERROR_NOT_SUPPORTED);
Achin Gupta86f23532019-10-11 15:41:16 +0100547 }
548}