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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Joel Hutton5cc3bc82018-03-21 11:40:57 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00006#ifndef COMMON_DEF_H
7#define COMMON_DEF_H
Dan Handley9df48042015-03-19 18:58:55 +00008
Yatharth Kochara65be2f2015-10-09 18:06:13 +01009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/bl_common.h>
12#include <lib/utils_def.h>
13#include <lib/xlat_tables/xlat_tables_defs.h>
Yatharth Kochara65be2f2015-10-09 18:06:13 +010014
Dan Handley9df48042015-03-19 18:58:55 +000015/******************************************************************************
16 * Required platform porting definitions that are expected to be common to
17 * all platforms
18 *****************************************************************************/
19
20/*
21 * Platform binary types for linking
22 */
Julius Werner8e0ef0f2019-07-09 14:02:43 -070023#ifdef __aarch64__
Dan Handley9df48042015-03-19 18:58:55 +000024#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
25#define PLATFORM_LINKER_ARCH aarch64
Julius Werner8e0ef0f2019-07-09 14:02:43 -070026#else
27#define PLATFORM_LINKER_FORMAT "elf32-littlearm"
28#define PLATFORM_LINKER_ARCH arm
29#endif /* __aarch64__ */
Dan Handley9df48042015-03-19 18:58:55 +000030
31/*
32 * Generic platform constants
33 */
34#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
35
Yatharth Kochara65be2f2015-10-09 18:06:13 +010036#define BL2_IMAGE_DESC { \
37 .image_id = BL2_IMAGE_ID, \
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000038 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
Yatharth Kochar51f76f62016-09-12 16:10:33 +010039 VERSION_2, image_info_t, 0), \
40 .image_info.image_base = BL2_BASE, \
41 .image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
42 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
43 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
44 .ep_info.pc = BL2_BASE, \
45}
Yatharth Kochara65be2f2015-10-09 18:06:13 +010046
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010047/*
48 * The following constants identify the extents of the code & read-only data
49 * regions. These addresses are used by the MMU setup code and therefore they
50 * must be page-aligned.
51 *
52 * When the code and read-only data are mapped as a single atomic section
53 * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
54 * code by specifying the read-only data section as empty.
55 *
56 * BL1 is different than the other images in the sense that its read-write data
57 * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
58 * run-time. Therefore, the read-write data in ROM can be mapped with the same
59 * memory attributes as the read-only data region. For this reason, BL1 uses
60 * different macros.
61 *
62 * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
63 * just points to the end of BL1's actual content in Trusted ROM. Therefore it
64 * needs to be rounded up to the next page size in order to map the whole last
65 * page of it with the right memory attributes.
66 */
67#if SEPARATE_CODE_AND_RODATA
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010068
Masahiro Yamada51bef612017-01-18 02:10:08 +090069#define BL1_CODE_END BL_CODE_END
Joel Hutton5cc3bc82018-03-21 11:40:57 +000070#define BL1_RO_DATA_BASE BL_RO_DATA_BASE
Masahiro Yamada51bef612017-01-18 02:10:08 +090071#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
Jiafei Pan43a7bf42018-03-21 07:20:09 +000072#if BL2_IN_XIP_MEM
73#define BL2_CODE_END BL_CODE_END
74#define BL2_RO_DATA_BASE BL_RO_DATA_BASE
75#define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE)
76#endif /* BL2_IN_XIP_MEM */
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010077#else
Antonio Nino Diazf0b14cf2018-10-04 09:55:23 +010078#define BL_RO_DATA_BASE UL(0)
79#define BL_RO_DATA_END UL(0)
Masahiro Yamada51bef612017-01-18 02:10:08 +090080#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
Jiafei Pan43a7bf42018-03-21 07:20:09 +000081#if BL2_IN_XIP_MEM
Antonio Nino Diazf0b14cf2018-10-04 09:55:23 +010082#define BL2_RO_DATA_BASE UL(0)
83#define BL2_RO_DATA_END UL(0)
Jiafei Pan43a7bf42018-03-21 07:20:09 +000084#define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
85#endif /* BL2_IN_XIP_MEM */
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010086#endif /* SEPARATE_CODE_AND_RODATA */
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000087
88#endif /* COMMON_DEF_H */