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Achin Gupta7c88f3f2014-02-18 18:09:12 +00001/*
David Cunado28f69ab2017-04-05 11:34:03 +01002 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Achin Gupta7c88f3f2014-02-18 18:09:12 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta7c88f3f2014-02-18 18:09:12 +00005 */
6
Achin Gupta7c88f3f2014-02-18 18:09:12 +00007#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +01008#include <bl_common.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +00009#include <debug.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010010#include <platform.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010011#include <platform_def.h>
Dan Handley4fd2f5c2014-08-04 11:41:20 +010012#include <platform_tsp.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +000013#include <spinlock.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010014#include <tsp.h>
Dan Handleye2c27f52014-08-01 17:58:27 +010015#include "tsp_private.h"
Achin Gupta7c88f3f2014-02-18 18:09:12 +000016
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010017
18/*******************************************************************************
Achin Gupta7c88f3f2014-02-18 18:09:12 +000019 * Lock to control access to the console
20 ******************************************************************************/
21spinlock_t console_lock;
22
23/*******************************************************************************
24 * Per cpu data structure to populate parameters for an SMC in C code and use
25 * a pointer to this structure in assembler code to populate x0-x7
26 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010027static tsp_args_t tsp_smc_args[PLATFORM_CORE_COUNT];
Achin Gupta7c88f3f2014-02-18 18:09:12 +000028
29/*******************************************************************************
30 * Per cpu data structure to keep track of TSP activity
31 ******************************************************************************/
Achin Gupta76717892014-05-09 11:42:56 +010032work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
Achin Gupta7c88f3f2014-02-18 18:09:12 +000033
34/*******************************************************************************
Sandrine Bailleuxbdba5e52016-06-16 14:24:26 +010035 * The TSP memory footprint starts at address BL32_BASE and ends with the
36 * linker symbol __BL32_END__. Use these addresses to compute the TSP image
37 * size.
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010038 ******************************************************************************/
Soby Mathew2ae20432015-01-08 18:02:44 +000039#define BL32_TOTAL_LIMIT (unsigned long)(&__BL32_END__)
Sandrine Bailleuxbdba5e52016-06-16 14:24:26 +010040#define BL32_TOTAL_SIZE (BL32_TOTAL_LIMIT - (unsigned long) BL32_BASE)
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010041
Dan Handleye2712bc2014-04-10 15:37:22 +010042static tsp_args_t *set_smc_args(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +000043 uint64_t arg1,
44 uint64_t arg2,
45 uint64_t arg3,
46 uint64_t arg4,
47 uint64_t arg5,
48 uint64_t arg6,
49 uint64_t arg7)
50{
Achin Gupta7c88f3f2014-02-18 18:09:12 +000051 uint32_t linear_id;
Dan Handleye2712bc2014-04-10 15:37:22 +010052 tsp_args_t *pcpu_smc_args;
Achin Gupta7c88f3f2014-02-18 18:09:12 +000053
54 /*
55 * Return to Secure Monitor by raising an SMC. The results of the
56 * service are passed as an arguments to the SMC
57 */
Soby Mathewda43b662015-07-08 21:45:46 +010058 linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000059 pcpu_smc_args = &tsp_smc_args[linear_id];
60 write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0);
61 write_sp_arg(pcpu_smc_args, TSP_ARG1, arg1);
62 write_sp_arg(pcpu_smc_args, TSP_ARG2, arg2);
63 write_sp_arg(pcpu_smc_args, TSP_ARG3, arg3);
64 write_sp_arg(pcpu_smc_args, TSP_ARG4, arg4);
65 write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5);
66 write_sp_arg(pcpu_smc_args, TSP_ARG6, arg6);
67 write_sp_arg(pcpu_smc_args, TSP_ARG7, arg7);
68
69 return pcpu_smc_args;
70}
71
72/*******************************************************************************
73 * TSP main entry point where it gets the opportunity to initialize its secure
74 * state/applications. Once the state is initialized, it must return to the
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010075 * SPD with a pointer to the 'tsp_vector_table' jump table.
Achin Gupta7c88f3f2014-02-18 18:09:12 +000076 ******************************************************************************/
77uint64_t tsp_main(void)
78{
Dan Handley91b624e2014-07-29 17:14:00 +010079 NOTICE("TSP: %s\n", version_string);
80 NOTICE("TSP: %s\n", build_message);
Sandrine Bailleuxbdba5e52016-06-16 14:24:26 +010081 INFO("TSP: Total memory base : 0x%lx\n", (unsigned long) BL32_BASE);
82 INFO("TSP: Total memory size : 0x%lx bytes\n", BL32_TOTAL_SIZE);
Dan Handley91b624e2014-07-29 17:14:00 +010083
Soby Mathewda43b662015-07-08 21:45:46 +010084 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000085
Achin Gupta7c88f3f2014-02-18 18:09:12 +000086 /* Initialize the platform */
Dan Handley4fd2f5c2014-08-04 11:41:20 +010087 tsp_platform_setup();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000088
89 /* Initialize secure/applications state here */
Achin Guptabbc33f22014-05-09 13:33:42 +010090 tsp_generic_timer_start();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000091
92 /* Update this cpu's statistics */
93 tsp_stats[linear_id].smc_count++;
94 tsp_stats[linear_id].eret_count++;
95 tsp_stats[linear_id].cpu_on_count++;
96
Dan Handley91b624e2014-07-29 17:14:00 +010097#if LOG_LEVEL >= LOG_LEVEL_INFO
Achin Gupta7c88f3f2014-02-18 18:09:12 +000098 spin_lock(&console_lock);
Soby Mathewda43b662015-07-08 21:45:46 +010099 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n",
100 read_mpidr(),
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000101 tsp_stats[linear_id].smc_count,
102 tsp_stats[linear_id].eret_count,
103 tsp_stats[linear_id].cpu_on_count);
104 spin_unlock(&console_lock);
Dan Handley91b624e2014-07-29 17:14:00 +0100105#endif
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100106 return (uint64_t) &tsp_vector_table;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000107}
108
109/*******************************************************************************
110 * This function performs any remaining book keeping in the test secure payload
111 * after this cpu's architectural state has been setup in response to an earlier
112 * psci cpu_on request.
113 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100114tsp_args_t *tsp_cpu_on_main(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000115{
Soby Mathewda43b662015-07-08 21:45:46 +0100116 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000117
Achin Guptabbc33f22014-05-09 13:33:42 +0100118 /* Initialize secure/applications state here */
119 tsp_generic_timer_start();
120
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000121 /* Update this cpu's statistics */
122 tsp_stats[linear_id].smc_count++;
123 tsp_stats[linear_id].eret_count++;
124 tsp_stats[linear_id].cpu_on_count++;
125
Dan Handley91b624e2014-07-29 17:14:00 +0100126#if LOG_LEVEL >= LOG_LEVEL_INFO
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000127 spin_lock(&console_lock);
Soby Mathewda43b662015-07-08 21:45:46 +0100128 INFO("TSP: cpu 0x%lx turned on\n", read_mpidr());
129 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n",
130 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100131 tsp_stats[linear_id].smc_count,
132 tsp_stats[linear_id].eret_count,
133 tsp_stats[linear_id].cpu_on_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000134 spin_unlock(&console_lock);
Dan Handley91b624e2014-07-29 17:14:00 +0100135#endif
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000136 /* Indicate to the SPD that we have completed turned ourselves on */
137 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0);
138}
139
140/*******************************************************************************
141 * This function performs any remaining book keeping in the test secure payload
142 * before this cpu is turned off in response to a psci cpu_off request.
143 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100144tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000145 uint64_t arg1,
146 uint64_t arg2,
147 uint64_t arg3,
148 uint64_t arg4,
149 uint64_t arg5,
150 uint64_t arg6,
151 uint64_t arg7)
152{
Soby Mathewda43b662015-07-08 21:45:46 +0100153 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000154
Achin Guptabbc33f22014-05-09 13:33:42 +0100155 /*
156 * This cpu is being turned off, so disable the timer to prevent the
157 * secure timer interrupt from interfering with power down. A pending
158 * interrupt will be lost but we do not care as we are turning off.
159 */
160 tsp_generic_timer_stop();
161
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000162 /* Update this cpu's statistics */
163 tsp_stats[linear_id].smc_count++;
164 tsp_stats[linear_id].eret_count++;
165 tsp_stats[linear_id].cpu_off_count++;
166
Dan Handley91b624e2014-07-29 17:14:00 +0100167#if LOG_LEVEL >= LOG_LEVEL_INFO
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000168 spin_lock(&console_lock);
Soby Mathewda43b662015-07-08 21:45:46 +0100169 INFO("TSP: cpu 0x%lx off request\n", read_mpidr());
170 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu off requests\n",
171 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100172 tsp_stats[linear_id].smc_count,
173 tsp_stats[linear_id].eret_count,
174 tsp_stats[linear_id].cpu_off_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000175 spin_unlock(&console_lock);
Dan Handley91b624e2014-07-29 17:14:00 +0100176#endif
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000177
Achin Gupta607084e2014-02-09 18:24:19 +0000178 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000179 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
180}
181
182/*******************************************************************************
183 * This function performs any book keeping in the test secure payload before
184 * this cpu's architectural state is saved in response to an earlier psci
185 * cpu_suspend request.
186 ******************************************************************************/
Soby Mathewf5121572014-09-30 11:19:51 +0100187tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000188 uint64_t arg1,
189 uint64_t arg2,
190 uint64_t arg3,
191 uint64_t arg4,
192 uint64_t arg5,
193 uint64_t arg6,
194 uint64_t arg7)
195{
Soby Mathewda43b662015-07-08 21:45:46 +0100196 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000197
Achin Guptabbc33f22014-05-09 13:33:42 +0100198 /*
199 * Save the time context and disable it to prevent the secure timer
200 * interrupt from interfering with wakeup from the suspend state.
201 */
202 tsp_generic_timer_save();
203 tsp_generic_timer_stop();
204
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000205 /* Update this cpu's statistics */
206 tsp_stats[linear_id].smc_count++;
207 tsp_stats[linear_id].eret_count++;
208 tsp_stats[linear_id].cpu_suspend_count++;
209
Dan Handley91b624e2014-07-29 17:14:00 +0100210#if LOG_LEVEL >= LOG_LEVEL_INFO
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000211 spin_lock(&console_lock);
Sandrine Bailleux8723adf2015-02-05 15:42:31 +0000212 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n",
Soby Mathewda43b662015-07-08 21:45:46 +0100213 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100214 tsp_stats[linear_id].smc_count,
215 tsp_stats[linear_id].eret_count,
216 tsp_stats[linear_id].cpu_suspend_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000217 spin_unlock(&console_lock);
Dan Handley91b624e2014-07-29 17:14:00 +0100218#endif
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000219
Achin Gupta607084e2014-02-09 18:24:19 +0000220 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000221 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0);
222}
223
224/*******************************************************************************
225 * This function performs any book keeping in the test secure payload after this
226 * cpu's architectural state has been restored after wakeup from an earlier psci
227 * cpu_suspend request.
228 ******************************************************************************/
Achin Gupta9a0ff9b2015-09-07 20:43:27 +0100229tsp_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000230 uint64_t arg1,
231 uint64_t arg2,
232 uint64_t arg3,
233 uint64_t arg4,
234 uint64_t arg5,
235 uint64_t arg6,
236 uint64_t arg7)
237{
Soby Mathewda43b662015-07-08 21:45:46 +0100238 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000239
Achin Guptabbc33f22014-05-09 13:33:42 +0100240 /* Restore the generic timer context */
241 tsp_generic_timer_restore();
242
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000243 /* Update this cpu's statistics */
244 tsp_stats[linear_id].smc_count++;
245 tsp_stats[linear_id].eret_count++;
246 tsp_stats[linear_id].cpu_resume_count++;
247
Dan Handley91b624e2014-07-29 17:14:00 +0100248#if LOG_LEVEL >= LOG_LEVEL_INFO
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000249 spin_lock(&console_lock);
Masahiro Yamadae93a0f42018-02-02 15:09:36 +0900250 INFO("TSP: cpu 0x%lx resumed. maximum off power level %lld\n",
Achin Gupta9a0ff9b2015-09-07 20:43:27 +0100251 read_mpidr(), max_off_pwrlvl);
Sandrine Bailleux8723adf2015-02-05 15:42:31 +0000252 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n",
Soby Mathewda43b662015-07-08 21:45:46 +0100253 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100254 tsp_stats[linear_id].smc_count,
255 tsp_stats[linear_id].eret_count,
256 tsp_stats[linear_id].cpu_suspend_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000257 spin_unlock(&console_lock);
Dan Handley91b624e2014-07-29 17:14:00 +0100258#endif
Achin Gupta607084e2014-02-09 18:24:19 +0000259 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000260 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0);
261}
262
263/*******************************************************************************
Juan Castillo4dc4a472014-08-12 11:17:06 +0100264 * This function performs any remaining bookkeeping in the test secure payload
265 * before the system is switched off (in response to a psci SYSTEM_OFF request)
266 ******************************************************************************/
267tsp_args_t *tsp_system_off_main(uint64_t arg0,
268 uint64_t arg1,
269 uint64_t arg2,
270 uint64_t arg3,
271 uint64_t arg4,
272 uint64_t arg5,
273 uint64_t arg6,
274 uint64_t arg7)
275{
Soby Mathewda43b662015-07-08 21:45:46 +0100276 uint32_t linear_id = plat_my_core_pos();
Juan Castillo4dc4a472014-08-12 11:17:06 +0100277
278 /* Update this cpu's statistics */
279 tsp_stats[linear_id].smc_count++;
280 tsp_stats[linear_id].eret_count++;
281
282#if LOG_LEVEL >= LOG_LEVEL_INFO
283 spin_lock(&console_lock);
Soby Mathewda43b662015-07-08 21:45:46 +0100284 INFO("TSP: cpu 0x%lx SYSTEM_OFF request\n", read_mpidr());
285 INFO("TSP: cpu 0x%lx: %d smcs, %d erets requests\n", read_mpidr(),
Juan Castillo4dc4a472014-08-12 11:17:06 +0100286 tsp_stats[linear_id].smc_count,
287 tsp_stats[linear_id].eret_count);
288 spin_unlock(&console_lock);
289#endif
290
291 /* Indicate to the SPD that we have completed this request */
292 return set_smc_args(TSP_SYSTEM_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
293}
294
295/*******************************************************************************
296 * This function performs any remaining bookkeeping in the test secure payload
297 * before the system is reset (in response to a psci SYSTEM_RESET request)
298 ******************************************************************************/
299tsp_args_t *tsp_system_reset_main(uint64_t arg0,
300 uint64_t arg1,
301 uint64_t arg2,
302 uint64_t arg3,
303 uint64_t arg4,
304 uint64_t arg5,
305 uint64_t arg6,
306 uint64_t arg7)
307{
Soby Mathewda43b662015-07-08 21:45:46 +0100308 uint32_t linear_id = plat_my_core_pos();
Juan Castillo4dc4a472014-08-12 11:17:06 +0100309
310 /* Update this cpu's statistics */
311 tsp_stats[linear_id].smc_count++;
312 tsp_stats[linear_id].eret_count++;
313
314#if LOG_LEVEL >= LOG_LEVEL_INFO
315 spin_lock(&console_lock);
Soby Mathewda43b662015-07-08 21:45:46 +0100316 INFO("TSP: cpu 0x%lx SYSTEM_RESET request\n", read_mpidr());
317 INFO("TSP: cpu 0x%lx: %d smcs, %d erets requests\n", read_mpidr(),
Juan Castillo4dc4a472014-08-12 11:17:06 +0100318 tsp_stats[linear_id].smc_count,
319 tsp_stats[linear_id].eret_count);
320 spin_unlock(&console_lock);
321#endif
322
323 /* Indicate to the SPD that we have completed this request */
324 return set_smc_args(TSP_SYSTEM_RESET_DONE, 0, 0, 0, 0, 0, 0, 0);
325}
326
327/*******************************************************************************
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000328 * TSP fast smc handler. The secure monitor jumps to this function by
329 * doing the ERET after populating X0-X7 registers. The arguments are received
330 * in the function arguments in order. Once the service is rendered, this
Soby Mathew9f71f702014-05-09 20:49:17 +0100331 * function returns to Secure Monitor by raising SMC.
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000332 ******************************************************************************/
Soby Mathew9f71f702014-05-09 20:49:17 +0100333tsp_args_t *tsp_smc_handler(uint64_t func,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000334 uint64_t arg1,
335 uint64_t arg2,
336 uint64_t arg3,
337 uint64_t arg4,
338 uint64_t arg5,
339 uint64_t arg6,
340 uint64_t arg7)
341{
Achin Gupta916a2c12014-02-09 23:11:46 +0000342 uint64_t results[2];
343 uint64_t service_args[2];
Soby Mathewda43b662015-07-08 21:45:46 +0100344 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000345
Achin Gupta916a2c12014-02-09 23:11:46 +0000346 /* Update this cpu's statistics */
347 tsp_stats[linear_id].smc_count++;
348 tsp_stats[linear_id].eret_count++;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000349
Masahiro Yamadae93a0f42018-02-02 15:09:36 +0900350 INFO("TSP: cpu 0x%lx received %s smc 0x%llx\n", read_mpidr(),
David Cunado28f69ab2017-04-05 11:34:03 +0100351 ((func >> 31) & 1) == 1 ? "fast" : "yielding",
Dan Handley91b624e2014-07-29 17:14:00 +0100352 func);
Soby Mathewda43b662015-07-08 21:45:46 +0100353 INFO("TSP: cpu 0x%lx: %d smcs, %d erets\n", read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100354 tsp_stats[linear_id].smc_count,
355 tsp_stats[linear_id].eret_count);
Achin Gupta916a2c12014-02-09 23:11:46 +0000356
357 /* Render secure services and obtain results here */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000358 results[0] = arg1;
359 results[1] = arg2;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000360
361 /*
362 * Request a service back from dispatcher/secure monitor. This call
363 * return and thereafter resume exectuion
364 */
365 tsp_get_magic(service_args);
366
367 /* Determine the function to perform based on the function ID */
Soby Mathew9f71f702014-05-09 20:49:17 +0100368 switch (TSP_BARE_FID(func)) {
369 case TSP_ADD:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000370 results[0] += service_args[0];
371 results[1] += service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000372 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100373 case TSP_SUB:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000374 results[0] -= service_args[0];
375 results[1] -= service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000376 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100377 case TSP_MUL:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000378 results[0] *= service_args[0];
379 results[1] *= service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000380 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100381 case TSP_DIV:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000382 results[0] /= service_args[0] ? service_args[0] : 1;
383 results[1] /= service_args[1] ? service_args[1] : 1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000384 break;
385 default:
386 break;
387 }
388
Soby Mathew9f71f702014-05-09 20:49:17 +0100389 return set_smc_args(func, 0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000390 results[0],
391 results[1],
Soby Mathew9f71f702014-05-09 20:49:17 +0100392 0, 0, 0, 0);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000393}
394
Douglas Raillardf2129652016-11-24 15:43:19 +0000395/*******************************************************************************
396 * TSP smc abort handler. This function is called when aborting a preemtped
David Cunado28f69ab2017-04-05 11:34:03 +0100397 * yielding SMC request. It should cleanup all resources owned by the SMC
Douglas Raillardf2129652016-11-24 15:43:19 +0000398 * handler such as locks or dynamically allocated memory so following SMC
399 * request are executed in a clean environment.
400 ******************************************************************************/
401tsp_args_t *tsp_abort_smc_handler(uint64_t func,
402 uint64_t arg1,
403 uint64_t arg2,
404 uint64_t arg3,
405 uint64_t arg4,
406 uint64_t arg5,
407 uint64_t arg6,
408 uint64_t arg7)
409{
410 return set_smc_args(TSP_ABORT_DONE, 0, 0, 0, 0, 0, 0, 0);
411}