| Varun Wadekar | 3c95993 | 2016-03-03 13:09:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __SMMU_H |
| 32 | #define __SMMU_H |
| 33 | |
| 34 | #include <mmio.h> |
| 35 | #include <tegra_def.h> |
| 36 | |
| 37 | /******************************************************************************* |
| 38 | * SMMU Register constants |
| 39 | ******************************************************************************/ |
| 40 | #define SMMU_CBn_SCTLR (0x0) |
| 41 | #define SMMU_CBn_SCTLR_STAGE2 (0x0) |
| 42 | #define SMMU_CBn_ACTLR (0x4) |
| 43 | #define SMMU_CBn_RESUME (0x8) |
| 44 | #define SMMU_CBn_TCR2 (0x10) |
| 45 | #define SMMU_CBn_TTBR0_LO (0x20) |
| 46 | #define SMMU_CBn_TTBR0_HI (0x24) |
| 47 | #define SMMU_CBn_TTBR1_LO (0x28) |
| 48 | #define SMMU_CBn_TTBR1_HI (0x2c) |
| 49 | #define SMMU_CBn_TCR_LPAE (0x30) |
| 50 | #define SMMU_CBn_TCR (0x30) |
| 51 | #define SMMU_CBn_TCR_EAE_1 (0x30) |
| 52 | #define SMMU_CBn_TCR (0x30) |
| 53 | #define SMMU_CBn_CONTEXTIDR (0x34) |
| 54 | #define SMMU_CBn_CONTEXTIDR_EAE_1 (0x34) |
| 55 | #define SMMU_CBn_PRRR_MAIR0 (0x38) |
| 56 | #define SMMU_CBn_NMRR_MAIR1 (0x3c) |
| 57 | #define SMMU_CBn_SMMU_CBn_PAR (0x50) |
| 58 | #define SMMU_CBn_SMMU_CBn_PAR0 (0x50) |
| 59 | #define SMMU_CBn_SMMU_CBn_PAR1 (0x54) |
| 60 | /* SMMU_CBn_SMMU_CBn_PAR0_Fault (0x50) */ |
| 61 | /* SMMU_CBn_SMMU_CBn_PAR0_Fault (0x54) */ |
| 62 | #define SMMU_CBn_FSR (0x58) |
| 63 | #define SMMU_CBn_FSRRESTORE (0x5c) |
| 64 | #define SMMU_CBn_FAR_LO (0x60) |
| 65 | #define SMMU_CBn_FAR_HI (0x64) |
| 66 | #define SMMU_CBn_FSYNR0 (0x68) |
| 67 | #define SMMU_CBn_IPAFAR_LO (0x70) |
| 68 | #define SMMU_CBn_IPAFAR_HI (0x74) |
| 69 | #define SMMU_CBn_TLBIVA_LO (0x600) |
| 70 | #define SMMU_CBn_TLBIVA_HI (0x604) |
| 71 | #define SMMU_CBn_TLBIVA_AARCH_32 (0x600) |
| 72 | #define SMMU_CBn_TLBIVAA_LO (0x608) |
| 73 | #define SMMU_CBn_TLBIVAA_HI (0x60c) |
| 74 | #define SMMU_CBn_TLBIVAA_AARCH_32 (0x608) |
| 75 | #define SMMU_CBn_TLBIASID (0x610) |
| 76 | #define SMMU_CBn_TLBIALL (0x618) |
| 77 | #define SMMU_CBn_TLBIVAL_LO (0x620) |
| 78 | #define SMMU_CBn_TLBIVAL_HI (0x624) |
| 79 | #define SMMU_CBn_TLBIVAL_AARCH_32 (0x618) |
| 80 | #define SMMU_CBn_TLBIVAAL_LO (0x628) |
| 81 | #define SMMU_CBn_TLBIVAAL_HI (0x62c) |
| 82 | #define SMMU_CBn_TLBIVAAL_AARCH_32 (0x628) |
| 83 | #define SMMU_CBn_TLBIIPAS2_LO (0x630) |
| 84 | #define SMMU_CBn_TLBIIPAS2_HI (0x634) |
| 85 | #define SMMU_CBn_TLBIIPAS2L_LO (0x638) |
| 86 | #define SMMU_CBn_TLBIIPAS2L_HI (0x63c) |
| 87 | #define SMMU_CBn_TLBSYNC (0x7f0) |
| 88 | #define SMMU_CBn_TLBSTATUS (0x7f4) |
| 89 | #define SMMU_CBn_ATSR (0x800) |
| 90 | #define SMMU_CBn_PMEVCNTR0 (0xe00) |
| 91 | #define SMMU_CBn_PMEVCNTR1 (0xe04) |
| 92 | #define SMMU_CBn_PMEVCNTR2 (0xe08) |
| 93 | #define SMMU_CBn_PMEVCNTR3 (0xe0c) |
| 94 | #define SMMU_CBn_PMEVTYPER0 (0xe80) |
| 95 | #define SMMU_CBn_PMEVTYPER1 (0xe84) |
| 96 | #define SMMU_CBn_PMEVTYPER2 (0xe88) |
| 97 | #define SMMU_CBn_PMEVTYPER3 (0xe8c) |
| 98 | #define SMMU_CBn_PMCFGR (0xf00) |
| 99 | #define SMMU_CBn_PMCR (0xf04) |
| 100 | #define SMMU_CBn_PMCEID (0xf20) |
| 101 | #define SMMU_CBn_PMCNTENSE (0xf40) |
| 102 | #define SMMU_CBn_PMCNTENCLR (0xf44) |
| 103 | #define SMMU_CBn_PMCNTENSET (0xf48) |
| 104 | #define SMMU_CBn_PMINTENCLR (0xf4c) |
| 105 | #define SMMU_CBn_PMOVSCLR (0xf50) |
| 106 | #define SMMU_CBn_PMOVSSET (0xf58) |
| 107 | #define SMMU_CBn_PMAUTHSTATUS (0xfb8) |
| 108 | #define SMMU_GNSR0_CR0 (0x0) |
| 109 | #define SMMU_GNSR0_CR2 (0x8) |
| 110 | #define SMMU_GNSR0_ACR (0x10) |
| 111 | #define SMMU_GNSR0_IDR0 (0x20) |
| 112 | #define SMMU_GNSR0_IDR1 (0x24) |
| 113 | #define SMMU_GNSR0_IDR2 (0x28) |
| 114 | #define SMMU_GNSR0_IDR7 (0x3c) |
| 115 | #define SMMU_GNSR0_GFAR_LO (0x40) |
| 116 | #define SMMU_GNSR0_GFAR_HI (0x44) |
| 117 | #define SMMU_GNSR0_GFSR (0x48) |
| 118 | #define SMMU_GNSR0_GFSRRESTORE (0x4c) |
| 119 | #define SMMU_GNSR0_GFSYNR0 (0x50) |
| 120 | #define SMMU_GNSR0_GFSYNR1 (0x54) |
| 121 | #define SMMU_GNSR0_GFSYNR1_v2 (0x54) |
| 122 | #define SMMU_GNSR0_TLBIVMID (0x64) |
| 123 | #define SMMU_GNSR0_TLBIALLNSNH (0x68) |
| 124 | #define SMMU_GNSR0_TLBIALLH (0x6c) |
| 125 | #define SMMU_GNSR0_TLBGSYNC (0x70) |
| 126 | #define SMMU_GNSR0_TLBGSTATUS (0x74) |
| 127 | #define SMMU_GNSR0_TLBIVAH_LO (0x78) |
| 128 | #define SMMU_GNSR0_TLBIVALH64_LO (0xb0) |
| 129 | #define SMMU_GNSR0_TLBIVALH64_HI (0xb4) |
| 130 | #define SMMU_GNSR0_TLBIVMIDS1 (0xb8) |
| 131 | #define SMMU_GNSR0_TLBIVAH64_LO (0xc0) |
| 132 | #define SMMU_GNSR0_TLBIVAH64_HI (0xc4) |
| 133 | #define SMMU_GNSR0_SMR0 (0x800) |
| 134 | #define SMMU_GNSR0_SMRn (0x800) |
| 135 | #define SMMU_GNSR0_SMR1 (0x804) |
| 136 | #define SMMU_GNSR0_SMR2 (0x808) |
| 137 | #define SMMU_GNSR0_SMR3 (0x80c) |
| 138 | #define SMMU_GNSR0_SMR4 (0x810) |
| 139 | #define SMMU_GNSR0_SMR5 (0x814) |
| 140 | #define SMMU_GNSR0_SMR6 (0x818) |
| 141 | #define SMMU_GNSR0_SMR7 (0x81c) |
| 142 | #define SMMU_GNSR0_SMR8 (0x820) |
| 143 | #define SMMU_GNSR0_SMR9 (0x824) |
| 144 | #define SMMU_GNSR0_SMR10 (0x828) |
| 145 | #define SMMU_GNSR0_SMR11 (0x82c) |
| 146 | #define SMMU_GNSR0_SMR12 (0x830) |
| 147 | #define SMMU_GNSR0_SMR13 (0x834) |
| 148 | #define SMMU_GNSR0_SMR14 (0x838) |
| 149 | #define SMMU_GNSR0_SMR15 (0x83c) |
| 150 | #define SMMU_GNSR0_SMR16 (0x840) |
| 151 | #define SMMU_GNSR0_SMR17 (0x844) |
| 152 | #define SMMU_GNSR0_SMR18 (0x848) |
| 153 | #define SMMU_GNSR0_SMR19 (0x84c) |
| 154 | #define SMMU_GNSR0_SMR20 (0x850) |
| 155 | #define SMMU_GNSR0_SMR21 (0x854) |
| 156 | #define SMMU_GNSR0_SMR22 (0x858) |
| 157 | #define SMMU_GNSR0_SMR23 (0x85c) |
| 158 | #define SMMU_GNSR0_SMR24 (0x860) |
| 159 | #define SMMU_GNSR0_SMR25 (0x864) |
| 160 | #define SMMU_GNSR0_SMR26 (0x868) |
| 161 | #define SMMU_GNSR0_SMR27 (0x86c) |
| 162 | #define SMMU_GNSR0_SMR28 (0x870) |
| 163 | #define SMMU_GNSR0_SMR29 (0x874) |
| 164 | #define SMMU_GNSR0_SMR30 (0x878) |
| 165 | #define SMMU_GNSR0_SMR31 (0x87c) |
| 166 | #define SMMU_GNSR0_SMR32 (0x880) |
| 167 | #define SMMU_GNSR0_SMR33 (0x884) |
| 168 | #define SMMU_GNSR0_SMR34 (0x888) |
| 169 | #define SMMU_GNSR0_SMR35 (0x88c) |
| 170 | #define SMMU_GNSR0_SMR36 (0x890) |
| 171 | #define SMMU_GNSR0_SMR37 (0x894) |
| 172 | #define SMMU_GNSR0_SMR38 (0x898) |
| 173 | #define SMMU_GNSR0_SMR39 (0x89c) |
| 174 | #define SMMU_GNSR0_SMR40 (0x8a0) |
| 175 | #define SMMU_GNSR0_SMR41 (0x8a4) |
| 176 | #define SMMU_GNSR0_SMR42 (0x8a8) |
| 177 | #define SMMU_GNSR0_SMR43 (0x8ac) |
| 178 | #define SMMU_GNSR0_SMR44 (0x8b0) |
| 179 | #define SMMU_GNSR0_SMR45 (0x8b4) |
| 180 | #define SMMU_GNSR0_SMR46 (0x8b8) |
| 181 | #define SMMU_GNSR0_SMR47 (0x8bc) |
| 182 | #define SMMU_GNSR0_SMR48 (0x8c0) |
| 183 | #define SMMU_GNSR0_SMR49 (0x8c4) |
| 184 | #define SMMU_GNSR0_SMR50 (0x8c8) |
| 185 | #define SMMU_GNSR0_SMR51 (0x8cc) |
| 186 | #define SMMU_GNSR0_SMR52 (0x8d0) |
| 187 | #define SMMU_GNSR0_SMR53 (0x8d4) |
| 188 | #define SMMU_GNSR0_SMR54 (0x8d8) |
| 189 | #define SMMU_GNSR0_SMR55 (0x8dc) |
| 190 | #define SMMU_GNSR0_SMR56 (0x8e0) |
| 191 | #define SMMU_GNSR0_SMR57 (0x8e4) |
| 192 | #define SMMU_GNSR0_SMR58 (0x8e8) |
| 193 | #define SMMU_GNSR0_SMR59 (0x8ec) |
| 194 | #define SMMU_GNSR0_SMR60 (0x8f0) |
| 195 | #define SMMU_GNSR0_SMR61 (0x8f4) |
| 196 | #define SMMU_GNSR0_SMR62 (0x8f8) |
| 197 | #define SMMU_GNSR0_SMR63 (0x8fc) |
| 198 | #define SMMU_GNSR0_SMR64 (0x900) |
| 199 | #define SMMU_GNSR0_SMR65 (0x904) |
| 200 | #define SMMU_GNSR0_SMR66 (0x908) |
| 201 | #define SMMU_GNSR0_SMR67 (0x90c) |
| 202 | #define SMMU_GNSR0_SMR68 (0x910) |
| 203 | #define SMMU_GNSR0_SMR69 (0x914) |
| 204 | #define SMMU_GNSR0_SMR70 (0x918) |
| 205 | #define SMMU_GNSR0_SMR71 (0x91c) |
| 206 | #define SMMU_GNSR0_SMR72 (0x920) |
| 207 | #define SMMU_GNSR0_SMR73 (0x924) |
| 208 | #define SMMU_GNSR0_SMR74 (0x928) |
| 209 | #define SMMU_GNSR0_SMR75 (0x92c) |
| 210 | #define SMMU_GNSR0_SMR76 (0x930) |
| 211 | #define SMMU_GNSR0_SMR77 (0x934) |
| 212 | #define SMMU_GNSR0_SMR78 (0x938) |
| 213 | #define SMMU_GNSR0_SMR79 (0x93c) |
| 214 | #define SMMU_GNSR0_SMR80 (0x940) |
| 215 | #define SMMU_GNSR0_SMR81 (0x944) |
| 216 | #define SMMU_GNSR0_SMR82 (0x948) |
| 217 | #define SMMU_GNSR0_SMR83 (0x94c) |
| 218 | #define SMMU_GNSR0_SMR84 (0x950) |
| 219 | #define SMMU_GNSR0_SMR85 (0x954) |
| 220 | #define SMMU_GNSR0_SMR86 (0x958) |
| 221 | #define SMMU_GNSR0_SMR87 (0x95c) |
| 222 | #define SMMU_GNSR0_SMR88 (0x960) |
| 223 | #define SMMU_GNSR0_SMR89 (0x964) |
| 224 | #define SMMU_GNSR0_SMR90 (0x968) |
| 225 | #define SMMU_GNSR0_SMR91 (0x96c) |
| 226 | #define SMMU_GNSR0_SMR92 (0x970) |
| 227 | #define SMMU_GNSR0_SMR93 (0x974) |
| 228 | #define SMMU_GNSR0_SMR94 (0x978) |
| 229 | #define SMMU_GNSR0_SMR95 (0x97c) |
| 230 | #define SMMU_GNSR0_SMR96 (0x980) |
| 231 | #define SMMU_GNSR0_SMR97 (0x984) |
| 232 | #define SMMU_GNSR0_SMR98 (0x988) |
| 233 | #define SMMU_GNSR0_SMR99 (0x98c) |
| 234 | #define SMMU_GNSR0_SMR100 (0x990) |
| 235 | #define SMMU_GNSR0_SMR101 (0x994) |
| 236 | #define SMMU_GNSR0_SMR102 (0x998) |
| 237 | #define SMMU_GNSR0_SMR103 (0x99c) |
| 238 | #define SMMU_GNSR0_SMR104 (0x9a0) |
| 239 | #define SMMU_GNSR0_SMR105 (0x9a4) |
| 240 | #define SMMU_GNSR0_SMR106 (0x9a8) |
| 241 | #define SMMU_GNSR0_SMR107 (0x9ac) |
| 242 | #define SMMU_GNSR0_SMR108 (0x9b0) |
| 243 | #define SMMU_GNSR0_SMR109 (0x9b4) |
| 244 | #define SMMU_GNSR0_SMR110 (0x9b8) |
| 245 | #define SMMU_GNSR0_SMR111 (0x9bc) |
| 246 | #define SMMU_GNSR0_SMR112 (0x9c0) |
| 247 | #define SMMU_GNSR0_SMR113 (0x9c4) |
| 248 | #define SMMU_GNSR0_SMR114 (0x9c8) |
| 249 | #define SMMU_GNSR0_SMR115 (0x9cc) |
| 250 | #define SMMU_GNSR0_SMR116 (0x9d0) |
| 251 | #define SMMU_GNSR0_SMR117 (0x9d4) |
| 252 | #define SMMU_GNSR0_SMR118 (0x9d8) |
| 253 | #define SMMU_GNSR0_SMR119 (0x9dc) |
| 254 | #define SMMU_GNSR0_SMR120 (0x9e0) |
| 255 | #define SMMU_GNSR0_SMR121 (0x9e4) |
| 256 | #define SMMU_GNSR0_SMR122 (0x9e8) |
| 257 | #define SMMU_GNSR0_SMR123 (0x9ec) |
| 258 | #define SMMU_GNSR0_SMR124 (0x9f0) |
| 259 | #define SMMU_GNSR0_SMR125 (0x9f4) |
| 260 | #define SMMU_GNSR0_SMR126 (0x9f8) |
| 261 | #define SMMU_GNSR0_SMR127 (0x9fc) |
| 262 | #define SMMU_GNSR0_S2CR0 (0xc00) |
| 263 | #define SMMU_GNSR0_S2CRn (0xc00) |
| 264 | #define SMMU_GNSR0_S2CRn (0xc00) |
| 265 | #define SMMU_GNSR0_S2CR1 (0xc04) |
| 266 | #define SMMU_GNSR0_S2CR2 (0xc08) |
| 267 | #define SMMU_GNSR0_S2CR3 (0xc0c) |
| 268 | #define SMMU_GNSR0_S2CR4 (0xc10) |
| 269 | #define SMMU_GNSR0_S2CR5 (0xc14) |
| 270 | #define SMMU_GNSR0_S2CR6 (0xc18) |
| 271 | #define SMMU_GNSR0_S2CR7 (0xc1c) |
| 272 | #define SMMU_GNSR0_S2CR8 (0xc20) |
| 273 | #define SMMU_GNSR0_S2CR9 (0xc24) |
| 274 | #define SMMU_GNSR0_S2CR10 (0xc28) |
| 275 | #define SMMU_GNSR0_S2CR11 (0xc2c) |
| 276 | #define SMMU_GNSR0_S2CR12 (0xc30) |
| 277 | #define SMMU_GNSR0_S2CR13 (0xc34) |
| 278 | #define SMMU_GNSR0_S2CR14 (0xc38) |
| 279 | #define SMMU_GNSR0_S2CR15 (0xc3c) |
| 280 | #define SMMU_GNSR0_S2CR16 (0xc40) |
| 281 | #define SMMU_GNSR0_S2CR17 (0xc44) |
| 282 | #define SMMU_GNSR0_S2CR18 (0xc48) |
| 283 | #define SMMU_GNSR0_S2CR19 (0xc4c) |
| 284 | #define SMMU_GNSR0_S2CR20 (0xc50) |
| 285 | #define SMMU_GNSR0_S2CR21 (0xc54) |
| 286 | #define SMMU_GNSR0_S2CR22 (0xc58) |
| 287 | #define SMMU_GNSR0_S2CR23 (0xc5c) |
| 288 | #define SMMU_GNSR0_S2CR24 (0xc60) |
| 289 | #define SMMU_GNSR0_S2CR25 (0xc64) |
| 290 | #define SMMU_GNSR0_S2CR26 (0xc68) |
| 291 | #define SMMU_GNSR0_S2CR27 (0xc6c) |
| 292 | #define SMMU_GNSR0_S2CR28 (0xc70) |
| 293 | #define SMMU_GNSR0_S2CR29 (0xc74) |
| 294 | #define SMMU_GNSR0_S2CR30 (0xc78) |
| 295 | #define SMMU_GNSR0_S2CR31 (0xc7c) |
| 296 | #define SMMU_GNSR0_S2CR32 (0xc80) |
| 297 | #define SMMU_GNSR0_S2CR33 (0xc84) |
| 298 | #define SMMU_GNSR0_S2CR34 (0xc88) |
| 299 | #define SMMU_GNSR0_S2CR35 (0xc8c) |
| 300 | #define SMMU_GNSR0_S2CR36 (0xc90) |
| 301 | #define SMMU_GNSR0_S2CR37 (0xc94) |
| 302 | #define SMMU_GNSR0_S2CR38 (0xc98) |
| 303 | #define SMMU_GNSR0_S2CR39 (0xc9c) |
| 304 | #define SMMU_GNSR0_S2CR40 (0xca0) |
| 305 | #define SMMU_GNSR0_S2CR41 (0xca4) |
| 306 | #define SMMU_GNSR0_S2CR42 (0xca8) |
| 307 | #define SMMU_GNSR0_S2CR43 (0xcac) |
| 308 | #define SMMU_GNSR0_S2CR44 (0xcb0) |
| 309 | #define SMMU_GNSR0_S2CR45 (0xcb4) |
| 310 | #define SMMU_GNSR0_S2CR46 (0xcb8) |
| 311 | #define SMMU_GNSR0_S2CR47 (0xcbc) |
| 312 | #define SMMU_GNSR0_S2CR48 (0xcc0) |
| 313 | #define SMMU_GNSR0_S2CR49 (0xcc4) |
| 314 | #define SMMU_GNSR0_S2CR50 (0xcc8) |
| 315 | #define SMMU_GNSR0_S2CR51 (0xccc) |
| 316 | #define SMMU_GNSR0_S2CR52 (0xcd0) |
| 317 | #define SMMU_GNSR0_S2CR53 (0xcd4) |
| 318 | #define SMMU_GNSR0_S2CR54 (0xcd8) |
| 319 | #define SMMU_GNSR0_S2CR55 (0xcdc) |
| 320 | #define SMMU_GNSR0_S2CR56 (0xce0) |
| 321 | #define SMMU_GNSR0_S2CR57 (0xce4) |
| 322 | #define SMMU_GNSR0_S2CR58 (0xce8) |
| 323 | #define SMMU_GNSR0_S2CR59 (0xcec) |
| 324 | #define SMMU_GNSR0_S2CR60 (0xcf0) |
| 325 | #define SMMU_GNSR0_S2CR61 (0xcf4) |
| 326 | #define SMMU_GNSR0_S2CR62 (0xcf8) |
| 327 | #define SMMU_GNSR0_S2CR63 (0xcfc) |
| 328 | #define SMMU_GNSR0_S2CR64 (0xd00) |
| 329 | #define SMMU_GNSR0_S2CR65 (0xd04) |
| 330 | #define SMMU_GNSR0_S2CR66 (0xd08) |
| 331 | #define SMMU_GNSR0_S2CR67 (0xd0c) |
| 332 | #define SMMU_GNSR0_S2CR68 (0xd10) |
| 333 | #define SMMU_GNSR0_S2CR69 (0xd14) |
| 334 | #define SMMU_GNSR0_S2CR70 (0xd18) |
| 335 | #define SMMU_GNSR0_S2CR71 (0xd1c) |
| 336 | #define SMMU_GNSR0_S2CR72 (0xd20) |
| 337 | #define SMMU_GNSR0_S2CR73 (0xd24) |
| 338 | #define SMMU_GNSR0_S2CR74 (0xd28) |
| 339 | #define SMMU_GNSR0_S2CR75 (0xd2c) |
| 340 | #define SMMU_GNSR0_S2CR76 (0xd30) |
| 341 | #define SMMU_GNSR0_S2CR77 (0xd34) |
| 342 | #define SMMU_GNSR0_S2CR78 (0xd38) |
| 343 | #define SMMU_GNSR0_S2CR79 (0xd3c) |
| 344 | #define SMMU_GNSR0_S2CR80 (0xd40) |
| 345 | #define SMMU_GNSR0_S2CR81 (0xd44) |
| 346 | #define SMMU_GNSR0_S2CR82 (0xd48) |
| 347 | #define SMMU_GNSR0_S2CR83 (0xd4c) |
| 348 | #define SMMU_GNSR0_S2CR84 (0xd50) |
| 349 | #define SMMU_GNSR0_S2CR85 (0xd54) |
| 350 | #define SMMU_GNSR0_S2CR86 (0xd58) |
| 351 | #define SMMU_GNSR0_S2CR87 (0xd5c) |
| 352 | #define SMMU_GNSR0_S2CR88 (0xd60) |
| 353 | #define SMMU_GNSR0_S2CR89 (0xd64) |
| 354 | #define SMMU_GNSR0_S2CR90 (0xd68) |
| 355 | #define SMMU_GNSR0_S2CR91 (0xd6c) |
| 356 | #define SMMU_GNSR0_S2CR92 (0xd70) |
| 357 | #define SMMU_GNSR0_S2CR93 (0xd74) |
| 358 | #define SMMU_GNSR0_S2CR94 (0xd78) |
| 359 | #define SMMU_GNSR0_S2CR95 (0xd7c) |
| 360 | #define SMMU_GNSR0_S2CR96 (0xd80) |
| 361 | #define SMMU_GNSR0_S2CR97 (0xd84) |
| 362 | #define SMMU_GNSR0_S2CR98 (0xd88) |
| 363 | #define SMMU_GNSR0_S2CR99 (0xd8c) |
| 364 | #define SMMU_GNSR0_S2CR100 (0xd90) |
| 365 | #define SMMU_GNSR0_S2CR101 (0xd94) |
| 366 | #define SMMU_GNSR0_S2CR102 (0xd98) |
| 367 | #define SMMU_GNSR0_S2CR103 (0xd9c) |
| 368 | #define SMMU_GNSR0_S2CR104 (0xda0) |
| 369 | #define SMMU_GNSR0_S2CR105 (0xda4) |
| 370 | #define SMMU_GNSR0_S2CR106 (0xda8) |
| 371 | #define SMMU_GNSR0_S2CR107 (0xdac) |
| 372 | #define SMMU_GNSR0_S2CR108 (0xdb0) |
| 373 | #define SMMU_GNSR0_S2CR109 (0xdb4) |
| 374 | #define SMMU_GNSR0_S2CR110 (0xdb8) |
| 375 | #define SMMU_GNSR0_S2CR111 (0xdbc) |
| 376 | #define SMMU_GNSR0_S2CR112 (0xdc0) |
| 377 | #define SMMU_GNSR0_S2CR113 (0xdc4) |
| 378 | #define SMMU_GNSR0_S2CR114 (0xdc8) |
| 379 | #define SMMU_GNSR0_S2CR115 (0xdcc) |
| 380 | #define SMMU_GNSR0_S2CR116 (0xdd0) |
| 381 | #define SMMU_GNSR0_S2CR117 (0xdd4) |
| 382 | #define SMMU_GNSR0_S2CR118 (0xdd8) |
| 383 | #define SMMU_GNSR0_S2CR119 (0xddc) |
| 384 | #define SMMU_GNSR0_S2CR120 (0xde0) |
| 385 | #define SMMU_GNSR0_S2CR121 (0xde4) |
| 386 | #define SMMU_GNSR0_S2CR122 (0xde8) |
| 387 | #define SMMU_GNSR0_S2CR123 (0xdec) |
| 388 | #define SMMU_GNSR0_S2CR124 (0xdf0) |
| 389 | #define SMMU_GNSR0_S2CR125 (0xdf4) |
| 390 | #define SMMU_GNSR0_S2CR126 (0xdf8) |
| 391 | #define SMMU_GNSR0_S2CR127 (0xdfc) |
| 392 | #define SMMU_GNSR0_PIDR0 (0xfe0) |
| 393 | #define SMMU_GNSR0_PIDR1 (0xfe4) |
| 394 | #define SMMU_GNSR0_PIDR2 (0xfe8) |
| 395 | #define SMMU_GNSR0_PIDR3 (0xfec) |
| 396 | #define SMMU_GNSR0_PIDR4 (0xfd0) |
| 397 | #define SMMU_GNSR0_PIDR5 (0xfd4) |
| 398 | #define SMMU_GNSR0_PIDR6 (0xfd8) |
| 399 | #define SMMU_GNSR0_PIDR7 (0xfdc) |
| 400 | #define SMMU_GNSR0_CIDR0 (0xff0) |
| 401 | #define SMMU_GNSR0_CIDR1 (0xff4) |
| 402 | #define SMMU_GNSR0_CIDR2 (0xff8) |
| 403 | #define SMMU_GNSR0_CIDR3 (0xffc) |
| 404 | #define SMMU_GNSR1_CBAR0 (0x0) |
| 405 | #define SMMU_GNSR1_CBARn (0x0) |
| 406 | #define SMMU_GNSR1_CBFRSYNRA0 (0x400) |
| 407 | #define SMMU_GNSR1_CBA2R0 (0x800) |
| 408 | #define SMMU_GNSR1_CBAR1 (0x4) |
| 409 | #define SMMU_GNSR1_CBFRSYNRA1 (0x404) |
| 410 | #define SMMU_GNSR1_CBA2R1 (0x804) |
| 411 | #define SMMU_GNSR1_CBAR2 (0x8) |
| 412 | #define SMMU_GNSR1_CBFRSYNRA2 (0x408) |
| 413 | #define SMMU_GNSR1_CBA2R2 (0x808) |
| 414 | #define SMMU_GNSR1_CBAR3 (0xc) |
| 415 | #define SMMU_GNSR1_CBFRSYNRA3 (0x40c) |
| 416 | #define SMMU_GNSR1_CBA2R3 (0x80c) |
| 417 | #define SMMU_GNSR1_CBAR4 (0x10) |
| 418 | #define SMMU_GNSR1_CBFRSYNRA4 (0x410) |
| 419 | #define SMMU_GNSR1_CBA2R4 (0x810) |
| 420 | #define SMMU_GNSR1_CBAR5 (0x14) |
| 421 | #define SMMU_GNSR1_CBFRSYNRA5 (0x414) |
| 422 | #define SMMU_GNSR1_CBA2R5 (0x814) |
| 423 | #define SMMU_GNSR1_CBAR6 (0x18) |
| 424 | #define SMMU_GNSR1_CBFRSYNRA6 (0x418) |
| 425 | #define SMMU_GNSR1_CBA2R6 (0x818) |
| 426 | #define SMMU_GNSR1_CBAR7 (0x1c) |
| 427 | #define SMMU_GNSR1_CBFRSYNRA7 (0x41c) |
| 428 | #define SMMU_GNSR1_CBA2R7 (0x81c) |
| 429 | #define SMMU_GNSR1_CBAR8 (0x20) |
| 430 | #define SMMU_GNSR1_CBFRSYNRA8 (0x420) |
| 431 | #define SMMU_GNSR1_CBA2R8 (0x820) |
| 432 | #define SMMU_GNSR1_CBAR9 (0x24) |
| 433 | #define SMMU_GNSR1_CBFRSYNRA9 (0x424) |
| 434 | #define SMMU_GNSR1_CBA2R9 (0x824) |
| 435 | #define SMMU_GNSR1_CBAR10 (0x28) |
| 436 | #define SMMU_GNSR1_CBFRSYNRA10 (0x428) |
| 437 | #define SMMU_GNSR1_CBA2R10 (0x828) |
| 438 | #define SMMU_GNSR1_CBAR11 (0x2c) |
| 439 | #define SMMU_GNSR1_CBFRSYNRA11 (0x42c) |
| 440 | #define SMMU_GNSR1_CBA2R11 (0x82c) |
| 441 | #define SMMU_GNSR1_CBAR12 (0x30) |
| 442 | #define SMMU_GNSR1_CBFRSYNRA12 (0x430) |
| 443 | #define SMMU_GNSR1_CBA2R12 (0x830) |
| 444 | #define SMMU_GNSR1_CBAR13 (0x34) |
| 445 | #define SMMU_GNSR1_CBFRSYNRA13 (0x434) |
| 446 | #define SMMU_GNSR1_CBA2R13 (0x834) |
| 447 | #define SMMU_GNSR1_CBAR14 (0x38) |
| 448 | #define SMMU_GNSR1_CBFRSYNRA14 (0x438) |
| 449 | #define SMMU_GNSR1_CBA2R14 (0x838) |
| 450 | #define SMMU_GNSR1_CBAR15 (0x3c) |
| 451 | #define SMMU_GNSR1_CBFRSYNRA15 (0x43c) |
| 452 | #define SMMU_GNSR1_CBA2R15 (0x83c) |
| 453 | #define SMMU_GNSR1_CBAR16 (0x40) |
| 454 | #define SMMU_GNSR1_CBFRSYNRA16 (0x440) |
| 455 | #define SMMU_GNSR1_CBA2R16 (0x840) |
| 456 | #define SMMU_GNSR1_CBAR17 (0x44) |
| 457 | #define SMMU_GNSR1_CBFRSYNRA17 (0x444) |
| 458 | #define SMMU_GNSR1_CBA2R17 (0x844) |
| 459 | #define SMMU_GNSR1_CBAR18 (0x48) |
| 460 | #define SMMU_GNSR1_CBFRSYNRA18 (0x448) |
| 461 | #define SMMU_GNSR1_CBA2R18 (0x848) |
| 462 | #define SMMU_GNSR1_CBAR19 (0x4c) |
| 463 | #define SMMU_GNSR1_CBFRSYNRA19 (0x44c) |
| 464 | #define SMMU_GNSR1_CBA2R19 (0x84c) |
| 465 | #define SMMU_GNSR1_CBAR20 (0x50) |
| 466 | #define SMMU_GNSR1_CBFRSYNRA20 (0x450) |
| 467 | #define SMMU_GNSR1_CBA2R20 (0x850) |
| 468 | #define SMMU_GNSR1_CBAR21 (0x54) |
| 469 | #define SMMU_GNSR1_CBFRSYNRA21 (0x454) |
| 470 | #define SMMU_GNSR1_CBA2R21 (0x854) |
| 471 | #define SMMU_GNSR1_CBAR22 (0x58) |
| 472 | #define SMMU_GNSR1_CBFRSYNRA22 (0x458) |
| 473 | #define SMMU_GNSR1_CBA2R22 (0x858) |
| 474 | #define SMMU_GNSR1_CBAR23 (0x5c) |
| 475 | #define SMMU_GNSR1_CBFRSYNRA23 (0x45c) |
| 476 | #define SMMU_GNSR1_CBA2R23 (0x85c) |
| 477 | #define SMMU_GNSR1_CBAR24 (0x60) |
| 478 | #define SMMU_GNSR1_CBFRSYNRA24 (0x460) |
| 479 | #define SMMU_GNSR1_CBA2R24 (0x860) |
| 480 | #define SMMU_GNSR1_CBAR25 (0x64) |
| 481 | #define SMMU_GNSR1_CBFRSYNRA25 (0x464) |
| 482 | #define SMMU_GNSR1_CBA2R25 (0x864) |
| 483 | #define SMMU_GNSR1_CBAR26 (0x68) |
| 484 | #define SMMU_GNSR1_CBFRSYNRA26 (0x468) |
| 485 | #define SMMU_GNSR1_CBA2R26 (0x868) |
| 486 | #define SMMU_GNSR1_CBAR27 (0x6c) |
| 487 | #define SMMU_GNSR1_CBFRSYNRA27 (0x46c) |
| 488 | #define SMMU_GNSR1_CBA2R27 (0x86c) |
| 489 | #define SMMU_GNSR1_CBAR28 (0x70) |
| 490 | #define SMMU_GNSR1_CBFRSYNRA28 (0x470) |
| 491 | #define SMMU_GNSR1_CBA2R28 (0x870) |
| 492 | #define SMMU_GNSR1_CBAR29 (0x74) |
| 493 | #define SMMU_GNSR1_CBFRSYNRA29 (0x474) |
| 494 | #define SMMU_GNSR1_CBA2R29 (0x874) |
| 495 | #define SMMU_GNSR1_CBAR30 (0x78) |
| 496 | #define SMMU_GNSR1_CBFRSYNRA30 (0x478) |
| 497 | #define SMMU_GNSR1_CBA2R30 (0x878) |
| 498 | #define SMMU_GNSR1_CBAR31 (0x7c) |
| 499 | #define SMMU_GNSR1_CBFRSYNRA31 (0x47c) |
| 500 | #define SMMU_GNSR1_CBA2R31 (0x87c) |
| 501 | #define SMMU_GNSR1_CBAR32 (0x80) |
| 502 | #define SMMU_GNSR1_CBFRSYNRA32 (0x480) |
| 503 | #define SMMU_GNSR1_CBA2R32 (0x880) |
| 504 | #define SMMU_GNSR1_CBAR33 (0x84) |
| 505 | #define SMMU_GNSR1_CBFRSYNRA33 (0x484) |
| 506 | #define SMMU_GNSR1_CBA2R33 (0x884) |
| 507 | #define SMMU_GNSR1_CBAR34 (0x88) |
| 508 | #define SMMU_GNSR1_CBFRSYNRA34 (0x488) |
| 509 | #define SMMU_GNSR1_CBA2R34 (0x888) |
| 510 | #define SMMU_GNSR1_CBAR35 (0x8c) |
| 511 | #define SMMU_GNSR1_CBFRSYNRA35 (0x48c) |
| 512 | #define SMMU_GNSR1_CBA2R35 (0x88c) |
| 513 | #define SMMU_GNSR1_CBAR36 (0x90) |
| 514 | #define SMMU_GNSR1_CBFRSYNRA36 (0x490) |
| 515 | #define SMMU_GNSR1_CBA2R36 (0x890) |
| 516 | #define SMMU_GNSR1_CBAR37 (0x94) |
| 517 | #define SMMU_GNSR1_CBFRSYNRA37 (0x494) |
| 518 | #define SMMU_GNSR1_CBA2R37 (0x894) |
| 519 | #define SMMU_GNSR1_CBAR38 (0x98) |
| 520 | #define SMMU_GNSR1_CBFRSYNRA38 (0x498) |
| 521 | #define SMMU_GNSR1_CBA2R38 (0x898) |
| 522 | #define SMMU_GNSR1_CBAR39 (0x9c) |
| 523 | #define SMMU_GNSR1_CBFRSYNRA39 (0x49c) |
| 524 | #define SMMU_GNSR1_CBA2R39 (0x89c) |
| 525 | #define SMMU_GNSR1_CBAR40 (0xa0) |
| 526 | #define SMMU_GNSR1_CBFRSYNRA40 (0x4a0) |
| 527 | #define SMMU_GNSR1_CBA2R40 (0x8a0) |
| 528 | #define SMMU_GNSR1_CBAR41 (0xa4) |
| 529 | #define SMMU_GNSR1_CBFRSYNRA41 (0x4a4) |
| 530 | #define SMMU_GNSR1_CBA2R41 (0x8a4) |
| 531 | #define SMMU_GNSR1_CBAR42 (0xa8) |
| 532 | #define SMMU_GNSR1_CBFRSYNRA42 (0x4a8) |
| 533 | #define SMMU_GNSR1_CBA2R42 (0x8a8) |
| 534 | #define SMMU_GNSR1_CBAR43 (0xac) |
| 535 | #define SMMU_GNSR1_CBFRSYNRA43 (0x4ac) |
| 536 | #define SMMU_GNSR1_CBA2R43 (0x8ac) |
| 537 | #define SMMU_GNSR1_CBAR44 (0xb0) |
| 538 | #define SMMU_GNSR1_CBFRSYNRA44 (0x4b0) |
| 539 | #define SMMU_GNSR1_CBA2R44 (0x8b0) |
| 540 | #define SMMU_GNSR1_CBAR45 (0xb4) |
| 541 | #define SMMU_GNSR1_CBFRSYNRA45 (0x4b4) |
| 542 | #define SMMU_GNSR1_CBA2R45 (0x8b4) |
| 543 | #define SMMU_GNSR1_CBAR46 (0xb8) |
| 544 | #define SMMU_GNSR1_CBFRSYNRA46 (0x4b8) |
| 545 | #define SMMU_GNSR1_CBA2R46 (0x8b8) |
| 546 | #define SMMU_GNSR1_CBAR47 (0xbc) |
| 547 | #define SMMU_GNSR1_CBFRSYNRA47 (0x4bc) |
| 548 | #define SMMU_GNSR1_CBA2R47 (0x8bc) |
| 549 | #define SMMU_GNSR1_CBAR48 (0xc0) |
| 550 | #define SMMU_GNSR1_CBFRSYNRA48 (0x4c0) |
| 551 | #define SMMU_GNSR1_CBA2R48 (0x8c0) |
| 552 | #define SMMU_GNSR1_CBAR49 (0xc4) |
| 553 | #define SMMU_GNSR1_CBFRSYNRA49 (0x4c4) |
| 554 | #define SMMU_GNSR1_CBA2R49 (0x8c4) |
| 555 | #define SMMU_GNSR1_CBAR50 (0xc8) |
| 556 | #define SMMU_GNSR1_CBFRSYNRA50 (0x4c8) |
| 557 | #define SMMU_GNSR1_CBA2R50 (0x8c8) |
| 558 | #define SMMU_GNSR1_CBAR51 (0xcc) |
| 559 | #define SMMU_GNSR1_CBFRSYNRA51 (0x4cc) |
| 560 | #define SMMU_GNSR1_CBA2R51 (0x8cc) |
| 561 | #define SMMU_GNSR1_CBAR52 (0xd0) |
| 562 | #define SMMU_GNSR1_CBFRSYNRA52 (0x4d0) |
| 563 | #define SMMU_GNSR1_CBA2R52 (0x8d0) |
| 564 | #define SMMU_GNSR1_CBAR53 (0xd4) |
| 565 | #define SMMU_GNSR1_CBFRSYNRA53 (0x4d4) |
| 566 | #define SMMU_GNSR1_CBA2R53 (0x8d4) |
| 567 | #define SMMU_GNSR1_CBAR54 (0xd8) |
| 568 | #define SMMU_GNSR1_CBFRSYNRA54 (0x4d8) |
| 569 | #define SMMU_GNSR1_CBA2R54 (0x8d8) |
| 570 | #define SMMU_GNSR1_CBAR55 (0xdc) |
| 571 | #define SMMU_GNSR1_CBFRSYNRA55 (0x4dc) |
| 572 | #define SMMU_GNSR1_CBA2R55 (0x8dc) |
| 573 | #define SMMU_GNSR1_CBAR56 (0xe0) |
| 574 | #define SMMU_GNSR1_CBFRSYNRA56 (0x4e0) |
| 575 | #define SMMU_GNSR1_CBA2R56 (0x8e0) |
| 576 | #define SMMU_GNSR1_CBAR57 (0xe4) |
| 577 | #define SMMU_GNSR1_CBFRSYNRA57 (0x4e4) |
| 578 | #define SMMU_GNSR1_CBA2R57 (0x8e4) |
| 579 | #define SMMU_GNSR1_CBAR58 (0xe8) |
| 580 | #define SMMU_GNSR1_CBFRSYNRA58 (0x4e8) |
| 581 | #define SMMU_GNSR1_CBA2R58 (0x8e8) |
| 582 | #define SMMU_GNSR1_CBAR59 (0xec) |
| 583 | #define SMMU_GNSR1_CBFRSYNRA59 (0x4ec) |
| 584 | #define SMMU_GNSR1_CBA2R59 (0x8ec) |
| 585 | #define SMMU_GNSR1_CBAR60 (0xf0) |
| 586 | #define SMMU_GNSR1_CBFRSYNRA60 (0x4f0) |
| 587 | #define SMMU_GNSR1_CBA2R60 (0x8f0) |
| 588 | #define SMMU_GNSR1_CBAR61 (0xf4) |
| 589 | #define SMMU_GNSR1_CBFRSYNRA61 (0x4f4) |
| 590 | #define SMMU_GNSR1_CBA2R61 (0x8f4) |
| 591 | #define SMMU_GNSR1_CBAR62 (0xf8) |
| 592 | #define SMMU_GNSR1_CBFRSYNRA62 (0x4f8) |
| 593 | #define SMMU_GNSR1_CBA2R62 (0x8f8) |
| 594 | #define SMMU_GNSR1_CBAR63 (0xfc) |
| 595 | #define SMMU_GNSR1_CBFRSYNRA63 (0x4fc) |
| 596 | #define SMMU_GNSR1_CBA2R63 (0x8fc) |
| 597 | |
| 598 | /******************************************************************************* |
| 599 | * SMMU Global Secure Aux. Configuration Register |
| 600 | ******************************************************************************/ |
| 601 | #define SMMU_GSR0_SECURE_ACR 0x10 |
| Varun Wadekar | ea709c3 | 2016-04-20 17:14:15 -0700 | [diff] [blame] | 602 | #define SMMU_GNSR_ACR (SMMU_GSR0_SECURE_ACR + 0x400) |
| Varun Wadekar | 3c95993 | 2016-03-03 13:09:08 -0800 | [diff] [blame] | 603 | #define SMMU_GSR0_PGSIZE_SHIFT 16 |
| 604 | #define SMMU_GSR0_PGSIZE_4K (0 << SMMU_GSR0_PGSIZE_SHIFT) |
| 605 | #define SMMU_GSR0_PGSIZE_64K (1 << SMMU_GSR0_PGSIZE_SHIFT) |
| Varun Wadekar | ea709c3 | 2016-04-20 17:14:15 -0700 | [diff] [blame] | 606 | #define SMMU_ACR_CACHE_LOCK_ENABLE_BIT (1 << 26) |
| 607 | |
| 608 | /******************************************************************************* |
| 609 | * SMMU Global Aux. Control Register |
| 610 | ******************************************************************************/ |
| 611 | #define SMMU_CBn_ACTLR_CPRE_BIT (1 << 1) |
| Varun Wadekar | 3c95993 | 2016-03-03 13:09:08 -0800 | [diff] [blame] | 612 | |
| 613 | /******************************************************************************* |
| 614 | * SMMU configuration constants |
| 615 | ******************************************************************************/ |
| 616 | #define ID1_PAGESIZE (1 << 31) |
| 617 | #define ID1_NUMPAGENDXB_SHIFT 28 |
| 618 | #define ID1_NUMPAGENDXB_MASK 7 |
| 619 | #define ID1_NUMS2CB_SHIFT 16 |
| 620 | #define ID1_NUMS2CB_MASK 0xff |
| 621 | #define ID1_NUMCB_SHIFT 0 |
| 622 | #define ID1_NUMCB_MASK 0xff |
| 623 | #define PGSHIFT 16 |
| 624 | #define CB_SIZE 0x800000 |
| 625 | |
| 626 | static inline uint32_t tegra_smmu_read_32(uint32_t off) |
| 627 | { |
| 628 | return mmio_read_32(TEGRA_SMMU_BASE + off); |
| 629 | } |
| 630 | |
| 631 | static inline void tegra_smmu_write_32(uint32_t off, uint32_t val) |
| 632 | { |
| 633 | mmio_write_32(TEGRA_SMMU_BASE + off, val); |
| 634 | } |
| 635 | |
| 636 | void tegra_smmu_init(void); |
| Varun Wadekar | 93bed2a | 2016-03-18 13:07:33 -0700 | [diff] [blame] | 637 | void tegra_smmu_save_context(uint64_t smmu_ctx_addr); |
| Varun Wadekar | 3c95993 | 2016-03-03 13:09:08 -0800 | [diff] [blame] | 638 | |
| 639 | #endif /*__SMMU_H */ |