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Yatharth Kochara65be2f2015-10-09 18:06:13 +01001/*
Jeenu Viswambharan2a9b8822017-02-21 14:40:44 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Yatharth Kochara65be2f2015-10-09 18:06:13 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <context.h>
34#include <context_mgmt.h>
Soby Mathewd75d2ba2016-05-17 14:01:32 +010035#include <debug.h>
Yatharth Kochara65be2f2015-10-09 18:06:13 +010036#include <platform.h>
37
38/*
39 * Following array will be used for context management.
40 * There are 2 instances, for the Secure and Non-Secure contexts.
41 */
42static cpu_context_t bl1_cpu_context[2];
43
44/* Following contains the cpu context pointers. */
45static void *bl1_cpu_context_ptr[2];
46
47
48void *cm_get_context(uint32_t security_state)
49{
50 assert(sec_state_is_valid(security_state));
51 return bl1_cpu_context_ptr[security_state];
52}
53
54void cm_set_context(void *context, uint32_t security_state)
55{
56 assert(sec_state_is_valid(security_state));
57 bl1_cpu_context_ptr[security_state] = context;
58}
59
60/*******************************************************************************
61 * This function prepares the context for Secure/Normal world images.
62 * Normal world images are transitioned to EL2(if supported) else EL1.
63 ******************************************************************************/
64void bl1_prepare_next_image(unsigned int image_id)
65{
66 unsigned int security_state;
67 image_desc_t *image_desc;
68 entry_point_info_t *next_bl_ep;
69
Soby Mathewd75d2ba2016-05-17 14:01:32 +010070#if CTX_INCLUDE_AARCH32_REGS
71 /*
72 * Ensure that the build flag to save AArch32 system registers in CPU
73 * context is not set for AArch64-only platforms.
74 */
Jeenu Viswambharan2a9b8822017-02-21 14:40:44 +000075 if (EL_IMPLEMENTED(1) == EL_IMPL_A64ONLY) {
Soby Mathewd75d2ba2016-05-17 14:01:32 +010076 ERROR("EL1 supports AArch64-only. Please set build flag "
77 "CTX_INCLUDE_AARCH32_REGS = 0");
78 panic();
79 }
80#endif
81
Yatharth Kochara65be2f2015-10-09 18:06:13 +010082 /* Get the image descriptor. */
83 image_desc = bl1_plat_get_image_desc(image_id);
84 assert(image_desc);
85
86 /* Get the entry point info. */
87 next_bl_ep = &image_desc->ep_info;
88
89 /* Get the image security state. */
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000090 security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
Yatharth Kochara65be2f2015-10-09 18:06:13 +010091
92 /* Setup the Secure/Non-Secure context if not done already. */
93 if (!cm_get_context(security_state))
94 cm_set_context(&bl1_cpu_context[security_state], security_state);
95
96 /* Prepare the SPSR for the next BL image. */
97 if (security_state == SECURE) {
98 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
99 DISABLE_ALL_EXCEPTIONS);
100 } else {
Jeenu Viswambharan2a9b8822017-02-21 14:40:44 +0000101 /* Use EL2 if supported; else use EL1. */
102 if (EL_IMPLEMENTED(2)) {
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100103 next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
104 DISABLE_ALL_EXCEPTIONS);
105 } else {
106 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
107 DISABLE_ALL_EXCEPTIONS);
108 }
109 }
110
111 /* Allow platform to make change */
112 bl1_plat_set_ep_info(image_id, next_bl_ep);
113
114 /* Prepare the context for the next BL image. */
115 cm_init_my_context(next_bl_ep);
116 cm_prepare_el3_exit(security_state);
117
118 /* Indicate that image is in execution state. */
119 image_desc->state = IMAGE_STATE_EXECUTED;
120
121 print_entry_point_info(next_bl_ep);
122}