blob: 7c9cf77d338532cbc9bf183009fedd854e711b1b [file] [log] [blame]
Sheetal Tigadoli13680c92019-12-13 10:39:06 +05301#
2# Copyright (c) 2015 - 2020, Broadcom
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_BL_COMMON_SOURCES += plat/brcm/board/common/board_common.c
8
9# If no board config makefile, do not include it
10ifneq (${BOARD_CFG},)
11BOARD_CFG_MAKE := $(shell find plat/brcm/board/${PLAT} -name '${BOARD_CFG}.mk')
12$(eval $(call add_define,BOARD_CFG))
13ifneq (${BOARD_CFG_MAKE},)
14$(info Including ${BOARD_CFG_MAKE})
15include ${BOARD_CFG_MAKE}
16else
17$(error Error: File ${BOARD_CFG}.mk not found in plat/brcm/board/${PLAT})
18endif
19endif
20
21# To compile with highest log level (VERBOSE) set value to 50
22LOG_LEVEL := 40
23
24# Use custom generic timer clock
25ifneq (${GENTIMER_ACTUAL_CLOCK},)
26$(info Using GENTIMER_ACTUAL_CLOCK=$(GENTIMER_ACTUAL_CLOCK))
27SYSCNT_FREQ := $(GENTIMER_ACTUAL_CLOCK)
28$(eval $(call add_define,SYSCNT_FREQ))
29endif
30
Sheetal Tigadoli2a96dc22019-12-18 12:01:01 +053031# Process ARM_BL31_IN_DRAM flag
32ifeq (${ARM_BL31_IN_DRAM},)
33ARM_BL31_IN_DRAM := 0
34endif
35$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36$(eval $(call add_define,ARM_BL31_IN_DRAM))
37
Sheetal Tigadoli13680c92019-12-13 10:39:06 +053038ifeq (${STANDALONE_BL2},yes)
39$(eval $(call add_define,MMU_DISABLED))
40endif
41
42# BL2 XIP from QSPI
43RUN_BL2_FROM_QSPI := 0
44ifeq (${RUN_BL2_FROM_QSPI},1)
45$(eval $(call add_define,RUN_BL2_FROM_QSPI))
46endif
47
48# Use CRMU SRAM from iHOST
49ifneq (${USE_CRMU_SRAM},)
50$(eval $(call add_define,USE_CRMU_SRAM))
51endif
52
53# On BRCM platforms, separate the code and read-only data sections to allow
54# mapping the former as executable and the latter as execute-never.
55SEPARATE_CODE_AND_RODATA := 1
56
57# Use generic OID definition (tbbr_oid.h)
58USE_TBBR_DEFS := 1
59
Sheetal Tigadoli2a96dc22019-12-18 12:01:01 +053060PLAT_INCLUDES += -Iplat/brcm/board/common \
61 -Iinclude/drivers/brcm
Sheetal Tigadoli13680c92019-12-13 10:39:06 +053062
63PLAT_BL_COMMON_SOURCES += plat/brcm/common/brcm_common.c \
64 plat/brcm/board/common/cmn_sec.c \
65 plat/brcm/board/common/bcm_console.c \
66 plat/brcm/board/common/plat_setup.c \
67 plat/brcm/board/common/platform_common.c \
68 drivers/arm/sp804/sp804_delay_timer.c \
69 drivers/delay_timer/delay_timer.c \
70 drivers/io/io_fip.c \
71 drivers/io/io_memmap.c \
72 drivers/io/io_storage.c \
73 plat/brcm/common/brcm_io_storage.c \
74 plat/brcm/board/common/err.c \
75 drivers/arm/sp805/sp805.c
76
77BL2_SOURCES += plat/brcm/common/brcm_bl2_mem_params_desc.c \
78 plat/brcm/common/brcm_image_load.c \
79 common/desc_image_load.c
80
81BL2_SOURCES += plat/brcm/common/brcm_bl2_setup.c
82
Sheetal Tigadoli2a96dc22019-12-18 12:01:01 +053083BL31_SOURCES += plat/brcm/common/brcm_bl31_setup.c
84
85#M0 runtime firmware
86ifdef SCP_BL2
87$(eval $(call add_define,NEED_SCP_BL2))
88SCP_CFG_DIR=$(dir ${SCP_BL2})
89PLAT_INCLUDES += -I${SCP_CFG_DIR}
90endif
91
92ifneq (${NEED_BL33},yes)
93# If there is no BL33, BL31 will jump to this address.
94ifeq (${USE_DDR},yes)
95PRELOADED_BL33_BASE := 0x80000000
96else
97PRELOADED_BL33_BASE := 0x74000000
98endif
99endif
100
Sheetal Tigadoli13680c92019-12-13 10:39:06 +0530101# Use translation tables library v1 by default
102ARM_XLAT_TABLES_LIB_V1 := 1
103ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
104$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
105$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
106PLAT_BL_COMMON_SOURCES += lib/xlat_tables/aarch64/xlat_tables.c \
107 lib/xlat_tables/xlat_tables_common.c
108endif