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Zelalem Aweke13dc8f12021-07-09 14:20:03 -05001/*
Soby Mathew68ea9542022-03-22 13:58:52 +00002 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
Zelalem Aweke13dc8f12021-07-09 14:20:03 -05003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <errno.h>
Manish Pandey9174a752021-11-09 20:49:56 +00009#include <inttypes.h>
10#include <stdint.h>
Zelalem Aweke13dc8f12021-07-09 14:20:03 -050011#include <string.h>
12
13#include <arch_helpers.h>
14#include <arch_features.h>
15#include <bl31/bl31.h>
16#include <common/debug.h>
17#include <common/runtime_svc.h>
18#include <context.h>
19#include <lib/el3_runtime/context_mgmt.h>
20#include <lib/el3_runtime/pubsub.h>
johpow019d134022021-06-16 17:57:28 -050021#include <lib/gpt_rme/gpt_rme.h>
Zelalem Aweke13dc8f12021-07-09 14:20:03 -050022
23#include <lib/spinlock.h>
24#include <lib/utils.h>
25#include <lib/xlat_tables/xlat_tables_v2.h>
26#include <plat/common/common_def.h>
27#include <plat/common/platform.h>
28#include <platform_def.h>
Zelalem Aweke13dc8f12021-07-09 14:20:03 -050029#include <services/rmmd_svc.h>
30#include <smccc_helpers.h>
Subhasish Ghoshc25225a2021-12-09 15:41:37 +000031#include <lib/extensions/sve.h>
Zelalem Aweke13dc8f12021-07-09 14:20:03 -050032#include "rmmd_initial_context.h"
33#include "rmmd_private.h"
34
35/*******************************************************************************
36 * RMM context information.
37 ******************************************************************************/
38rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT];
39
40/*******************************************************************************
41 * RMM entry point information. Discovered on the primary core and reused
42 * on secondary cores.
43 ******************************************************************************/
44static entry_point_info_t *rmm_ep_info;
45
46/*******************************************************************************
47 * Static function declaration.
48 ******************************************************************************/
49static int32_t rmm_init(void);
Zelalem Aweke13dc8f12021-07-09 14:20:03 -050050
51/*******************************************************************************
52 * This function takes an RMM context pointer and performs a synchronous entry
53 * into it.
54 ******************************************************************************/
55uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx)
56{
57 uint64_t rc;
58
59 assert(rmm_ctx != NULL);
60
61 cm_set_context(&(rmm_ctx->cpu_ctx), REALM);
62
63 /* Save the current el1/el2 context before loading realm context. */
64 cm_el1_sysregs_context_save(NON_SECURE);
65 cm_el2_sysregs_context_save(NON_SECURE);
66
67 /* Restore the realm context assigned above */
68 cm_el1_sysregs_context_restore(REALM);
69 cm_el2_sysregs_context_restore(REALM);
70 cm_set_next_eret_context(REALM);
71
72 /* Enter RMM */
73 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx);
74
75 /* Save realm context */
76 cm_el1_sysregs_context_save(REALM);
77 cm_el2_sysregs_context_save(REALM);
78
79 /* Restore the el1/el2 context again. */
80 cm_el1_sysregs_context_restore(NON_SECURE);
81 cm_el2_sysregs_context_restore(NON_SECURE);
82
83 return rc;
84}
85
86/*******************************************************************************
87 * This function returns to the place where rmmd_rmm_sync_entry() was
88 * called originally.
89 ******************************************************************************/
90__dead2 void rmmd_rmm_sync_exit(uint64_t rc)
91{
92 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()];
93
94 /* Get context of the RMM in use by this CPU. */
95 assert(cm_get_context(REALM) == &(ctx->cpu_ctx));
96
97 /*
98 * The RMMD must have initiated the original request through a
99 * synchronous entry into RMM. Jump back to the original C runtime
100 * context with the value of rc in x0;
101 */
102 rmmd_rmm_exit(ctx->c_rt_ctx, rc);
103
104 panic();
105}
106
107static void rmm_el2_context_init(el2_sysregs_t *regs)
108{
109 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2;
110 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1;
111}
112
113/*******************************************************************************
Subhasish Ghoshc25225a2021-12-09 15:41:37 +0000114 * Enable architecture extensions on first entry to Realm world.
115 ******************************************************************************/
116static void manage_extensions_realm(cpu_context_t *ctx)
117{
118#if ENABLE_SVE_FOR_NS
119 /*
120 * Enable SVE and FPU in realm context when it is enabled for NS.
121 * Realm manager must ensure that the SVE and FPU register
122 * contexts are properly managed.
123 */
124 sve_enable(ctx);
125#else
126 /*
127 * Disable SVE and FPU in realm context when it is disabled for NS.
128 */
129 sve_disable(ctx);
130#endif /* ENABLE_SVE_FOR_NS */
131}
132
133/*******************************************************************************
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500134 * Jump to the RMM for the first time.
135 ******************************************************************************/
136static int32_t rmm_init(void)
137{
138
139 uint64_t rc;
140
141 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()];
142
143 INFO("RMM init start.\n");
144 ctx->state = RMM_STATE_RESET;
145
Subhasish Ghoshc25225a2021-12-09 15:41:37 +0000146 /* Enable architecture extensions */
147 manage_extensions_realm(&ctx->cpu_ctx);
148
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500149 /* Initialize RMM EL2 context. */
150 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx);
151
152 rc = rmmd_rmm_sync_entry(ctx);
153 if (rc != 0ULL) {
Manish Pandey9174a752021-11-09 20:49:56 +0000154 ERROR("RMM initialisation failed 0x%" PRIx64 "\n", rc);
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500155 panic();
156 }
157
158 ctx->state = RMM_STATE_IDLE;
159 INFO("RMM init end.\n");
160
161 return 1;
162}
163
164/*******************************************************************************
165 * Load and read RMM manifest, setup RMM.
166 ******************************************************************************/
167int rmmd_setup(void)
168{
169 uint32_t ep_attr;
170 unsigned int linear_id = plat_my_core_pos();
171 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id];
172
173 /* Make sure RME is supported. */
174 assert(get_armv9_2_feat_rme_support() != 0U);
175
176 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM);
177 if (rmm_ep_info == NULL) {
178 WARN("No RMM image provided by BL2 boot loader, Booting "
179 "device without RMM initialization. SMCs destined for "
180 "RMM will return SMC_UNK\n");
181 return -ENOENT;
182 }
183
184 /* Under no circumstances will this parameter be 0 */
185 assert(rmm_ep_info->pc == RMM_BASE);
186
187 /* Initialise an entrypoint to set up the CPU context */
188 ep_attr = EP_REALM;
189 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) {
190 ep_attr |= EP_EE_BIG;
191 }
192
193 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr);
194 rmm_ep_info->spsr = SPSR_64(MODE_EL2,
195 MODE_SP_ELX,
196 DISABLE_ALL_EXCEPTIONS);
197
198 /* Initialise RMM context with this entry point information */
199 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info);
200
201 INFO("RMM setup done.\n");
202
203 /* Register init function for deferred init. */
204 bl31_register_rmm_init(&rmm_init);
205
206 return 0;
207}
208
209/*******************************************************************************
210 * Forward SMC to the other security state
211 ******************************************************************************/
Soby Mathewfccd3ea2021-11-17 15:13:30 +0000212static uint64_t rmmd_smc_forward(uint32_t src_sec_state,
213 uint32_t dst_sec_state, uint64_t x0,
214 uint64_t x1, uint64_t x2, uint64_t x3,
215 uint64_t x4, void *handle)
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500216{
217 /* Save incoming security state */
218 cm_el1_sysregs_context_save(src_sec_state);
219 cm_el2_sysregs_context_save(src_sec_state);
220
221 /* Restore outgoing security state */
222 cm_el1_sysregs_context_restore(dst_sec_state);
223 cm_el2_sysregs_context_restore(dst_sec_state);
224 cm_set_next_eret_context(dst_sec_state);
225
Soby Mathewfccd3ea2021-11-17 15:13:30 +0000226 /*
227 * As per SMCCCv1.1, we need to preserve x4 to x7 unless
228 * being used as return args. Hence we differentiate the
229 * onward and backward path. Support upto 8 args in the
230 * onward path and 4 args in return path.
231 */
232 if (src_sec_state == NON_SECURE) {
233 SMC_RET8(cm_get_context(dst_sec_state), x0, x1, x2, x3, x4,
234 SMC_GET_GP(handle, CTX_GPREG_X5),
235 SMC_GET_GP(handle, CTX_GPREG_X6),
236 SMC_GET_GP(handle, CTX_GPREG_X7));
237 } else {
238 SMC_RET4(cm_get_context(dst_sec_state), x0, x1, x2, x3);
239 }
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500240}
241
242/*******************************************************************************
243 * This function handles all SMCs in the range reserved for RMI. Each call is
244 * either forwarded to the other security state or handled by the RMM dispatcher
245 ******************************************************************************/
246uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2,
247 uint64_t x3, uint64_t x4, void *cookie,
248 void *handle, uint64_t flags)
249{
250 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()];
251 uint32_t src_sec_state;
252
253 /* Determine which security state this SMC originated from */
254 src_sec_state = caller_sec_state(flags);
255
256 /* RMI must not be invoked by the Secure world */
257 if (src_sec_state == SMC_FROM_SECURE) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000258 WARN("RMMD: RMI invoked by secure world.\n");
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500259 SMC_RET1(handle, SMC_UNK);
260 }
261
262 /*
263 * Forward an RMI call from the Normal world to the Realm world as it
264 * is.
265 */
266 if (src_sec_state == SMC_FROM_NON_SECURE) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000267 VERBOSE("RMMD: RMI call from non-secure world.\n");
Soby Mathewfccd3ea2021-11-17 15:13:30 +0000268 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid,
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500269 x1, x2, x3, x4, handle);
270 }
271
Soby Mathew68ea9542022-03-22 13:58:52 +0000272 if (src_sec_state != SMC_FROM_REALM) {
273 SMC_RET1(handle, SMC_UNK);
274 }
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500275
276 switch (smc_fid) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000277 case RMMD_RMI_REQ_COMPLETE:
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500278 if (ctx->state == RMM_STATE_RESET) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000279 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n");
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500280 rmmd_rmm_sync_exit(x1);
281 }
282
Soby Mathewfccd3ea2021-11-17 15:13:30 +0000283 return rmmd_smc_forward(REALM, NON_SECURE, x1,
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500284 x2, x3, x4, 0, handle);
285
286 default:
Soby Mathew68ea9542022-03-22 13:58:52 +0000287 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid);
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500288 SMC_RET1(handle, SMC_UNK);
289 }
290}
291
292/*******************************************************************************
293 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM
294 * is done after initialising minimal architectural state that guarantees safe
295 * execution.
296 ******************************************************************************/
297static void *rmmd_cpu_on_finish_handler(const void *arg)
298{
299 int32_t rc;
300 uint32_t linear_id = plat_my_core_pos();
301 rmmd_rmm_context_t *ctx = &rmm_context[linear_id];
302
303 ctx->state = RMM_STATE_RESET;
304
305 /* Initialise RMM context with this entry point information */
306 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info);
307
Subhasish Ghoshc25225a2021-12-09 15:41:37 +0000308 /* Enable architecture extensions */
309 manage_extensions_realm(&ctx->cpu_ctx);
310
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500311 /* Initialize RMM EL2 context. */
312 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx);
313
314 rc = rmmd_rmm_sync_entry(ctx);
315 if (rc != 0) {
316 ERROR("RMM initialisation failed (%d) on CPU%d\n", rc,
317 linear_id);
318 panic();
319 }
320
321 ctx->state = RMM_STATE_IDLE;
322 return NULL;
323}
324
325/* Subscribe to PSCI CPU on to initialize RMM on secondary */
326SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler);
327
Soby Mathew68ea9542022-03-22 13:58:52 +0000328/* Convert GPT lib error to RMMD GTS error */
329static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address)
330{
331 int ret;
332
333 if (error == 0) {
334 return RMMD_OK;
335 }
336
337 if (error == -EINVAL) {
338 ret = RMMD_ERR_BAD_ADDR;
339 } else {
340 /* This is the only other error code we expect */
341 assert(error == -EPERM);
342 ret = RMMD_ERR_BAD_PAS;
343 }
344
345 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n",
346 error, address, smc_fid);
347 return ret;
348}
349
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500350/*******************************************************************************
Soby Mathew68ea9542022-03-22 13:58:52 +0000351 * This function handles RMM-EL3 interface SMCs
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500352 ******************************************************************************/
Soby Mathew68ea9542022-03-22 13:58:52 +0000353uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2,
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500354 uint64_t x3, uint64_t x4, void *cookie,
355 void *handle, uint64_t flags)
356{
357 uint32_t src_sec_state;
Robert Wakim48e6b572021-10-21 15:39:56 +0100358 int ret;
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500359
360 /* Determine which security state this SMC originated from */
361 src_sec_state = caller_sec_state(flags);
362
363 if (src_sec_state != SMC_FROM_REALM) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000364 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n");
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500365 SMC_RET1(handle, SMC_UNK);
366 }
367
368 switch (smc_fid) {
Soby Mathew68ea9542022-03-22 13:58:52 +0000369 case RMMD_GTSI_DELEGATE:
Robert Wakim48e6b572021-10-21 15:39:56 +0100370 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM);
Soby Mathew68ea9542022-03-22 13:58:52 +0000371 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1));
372 case RMMD_GTSI_UNDELEGATE:
Robert Wakim48e6b572021-10-21 15:39:56 +0100373 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM);
Soby Mathew68ea9542022-03-22 13:58:52 +0000374 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1));
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500375 default:
Soby Mathew68ea9542022-03-22 13:58:52 +0000376 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid);
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500377 SMC_RET1(handle, SMC_UNK);
378 }
Zelalem Aweke13dc8f12021-07-09 14:20:03 -0500379}