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Stephan Gerhold14fdf072021-12-01 20:01:11 +01001#
Stephan Gerhold69fabaa2023-03-14 11:09:44 +01002# Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
Stephan Gerhold14fdf072021-12-01 20:01:11 +01003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include drivers/arm/gic/v2/gicv2.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
Stephan Gerhold4bc53a12022-08-28 15:18:55 +020010PLAT_BL_COMMON_SOURCES := ${GICV2_SOURCES} \
11 ${XLAT_TABLES_LIB_SRCS} \
12 drivers/delay_timer/delay_timer.c \
13 drivers/delay_timer/generic_delay_timer.c \
14 plat/common/plat_gicv2.c \
15 plat/qti/msm8916/msm8916_gicv2.c \
16 plat/qti/msm8916/msm8916_setup.c \
17 plat/qti/msm8916/${ARCH}/msm8916_helpers.S \
18 plat/qti/msm8916/${ARCH}/uartdm_console.S
Stephan Gerhold14fdf072021-12-01 20:01:11 +010019
Stephan Gerhold4bc53a12022-08-28 15:18:55 +020020MSM8916_PM_SOURCES := lib/cpus/${ARCH}/cortex_a53.S \
21 plat/common/plat_psci_common.c \
22 plat/qti/msm8916/msm8916_config.c \
23 plat/qti/msm8916/msm8916_cpu_boot.c \
24 plat/qti/msm8916/msm8916_pm.c \
25 plat/qti/msm8916/msm8916_topology.c
26
27BL31_SOURCES += ${MSM8916_PM_SOURCES} \
28 plat/qti/msm8916/msm8916_bl31_setup.c
Stephan Gerhold14fdf072021-12-01 20:01:11 +010029
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020030PLAT_INCLUDES := -Iplat/qti/msm8916/include
31
32ifeq (${ARCH},aarch64)
33# arm_macros.S exists only on aarch64 currently
34PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
35endif
Stephan Gerhold14fdf072021-12-01 20:01:11 +010036
37# Only BL31 is supported at the moment and is entered on a single CPU
38RESET_TO_BL31 := 1
39COLD_BOOT_SINGLE_CPU := 1
40
Stephan Gerhold14fdf072021-12-01 20:01:11 +010041# Have different sections for code and rodata
42SEPARATE_CODE_AND_RODATA := 1
43
44# Single cluster
45WARMBOOT_ENABLE_DCACHE_EARLY := 1
46
47# Disable features unsupported in ARMv8.0
Andre Przywara30661a92023-02-03 15:30:14 +000048ENABLE_SPE_FOR_NS := 0
Stephan Gerhold14fdf072021-12-01 20:01:11 +010049ENABLE_SVE_FOR_NS := 0
50
Stephan Gerhold69fabaa2023-03-14 11:09:44 +010051# Disable workarounds unnecessary for Cortex-A53
52WORKAROUND_CVE_2017_5715 := 0
53WORKAROUND_CVE_2022_23960 := 0
54
Stephan Gerhold14fdf072021-12-01 20:01:11 +010055# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply
56ERRATA_A53_819472 := 1
57ERRATA_A53_824069 := 1
58ERRATA_A53_826319 := 1
59ERRATA_A53_827319 := 1
60ERRATA_A53_835769 := 1
61ERRATA_A53_836870 := 1
62ERRATA_A53_843419 := 1
63ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3
64ERRATA_A53_1530924 := 1
65
Stephan Gerholdd0fed052023-03-24 19:18:51 +010066# Build config flags
67# ------------------
68BL31_BASE ?= 0x86500000
Stephan Gerholdd0fed052023-03-24 19:18:51 +010069PRELOADED_BL33_BASE ?= 0x8f600000
70
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020071ifeq (${ARCH},aarch64)
72BL32_BASE ?= BL31_LIMIT
Stephan Gerhold14fdf072021-12-01 20:01:11 +010073$(eval $(call add_define,BL31_BASE))
Stephan Gerholdb68e4e92022-08-28 15:18:55 +020074else
75# There is no BL31 on aarch32, so reuse its location for BL32
76BL32_BASE ?= $(BL31_BASE)
77endif
Stephan Gerhold14fdf072021-12-01 20:01:11 +010078$(eval $(call add_define,BL32_BASE))
Stephan Gerhold71939dd2022-09-02 23:29:17 +020079
80# UART number to use for TF-A output during early boot
81QTI_UART_NUM ?= 2
82$(eval $(call assert_numeric,QTI_UART_NUM))
83$(eval $(call add_define,QTI_UART_NUM))
84
85# Set to 1 on the command line to keep using UART after early boot.
86# Requires reserving the UART and related clocks inside the normal world.
87QTI_RUNTIME_UART ?= 0
88$(eval $(call assert_boolean,QTI_RUNTIME_UART))
89$(eval $(call add_define,QTI_RUNTIME_UART))