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Jens Wiklander52c798e2015-12-07 14:37:10 +01001/*
2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jens Wiklander52c798e2015-12-07 14:37:10 +01005 */
6
7#include <arch_helpers.h>
8#include <bl_common.h>
9#include <platform_def.h>
Fu Wei77ecd462017-07-31 18:28:32 +080010#include <arm_xlat_tables.h>
Isla Mitchelle3631462017-07-14 10:46:32 +010011#include "qemu_private.h"
Jens Wiklander52c798e2015-12-07 14:37:10 +010012
13#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
14 DEVICE0_SIZE, \
15 MT_DEVICE | MT_RW | MT_SECURE)
16
17#ifdef DEVICE1_BASE
18#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
19 DEVICE1_SIZE, \
20 MT_DEVICE | MT_RW | MT_SECURE)
21#endif
22
23#ifdef DEVICE2_BASE
24#define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \
25 DEVICE2_SIZE, \
26 MT_DEVICE | MT_RO | MT_SECURE)
27#endif
28
29#define MAP_SHARED_RAM MAP_REGION_FLAT(SHARED_RAM_BASE, \
30 SHARED_RAM_SIZE, \
31 MT_DEVICE | MT_RW | MT_SECURE)
32
33#define MAP_BL32_MEM MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE, \
34 MT_MEMORY | MT_RW | MT_SECURE)
35
36#define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \
37 MT_MEMORY | MT_RW | MT_NS)
38
39#define MAP_FLASH0 MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
40 MT_MEMORY | MT_RO | MT_SECURE)
41
42/*
43 * Table of regions for various BL stages to map using the MMU.
44 * This doesn't include TZRAM as the 'mem_layout' argument passed to
45 * arm_configure_mmu_elx() will give the available subset of that,
46 */
Masahiro Yamada441bfdd2016-12-25 23:36:24 +090047#ifdef IMAGE_BL1
Jens Wiklander52c798e2015-12-07 14:37:10 +010048static const mmap_region_t plat_qemu_mmap[] = {
49 MAP_FLASH0,
50 MAP_SHARED_RAM,
51 MAP_DEVICE0,
52#ifdef MAP_DEVICE1
53 MAP_DEVICE1,
54#endif
55#ifdef MAP_DEVICE2
56 MAP_DEVICE2,
57#endif
58 {0}
59};
60#endif
Masahiro Yamada441bfdd2016-12-25 23:36:24 +090061#ifdef IMAGE_BL2
Jens Wiklander52c798e2015-12-07 14:37:10 +010062static const mmap_region_t plat_qemu_mmap[] = {
63 MAP_FLASH0,
64 MAP_SHARED_RAM,
65 MAP_DEVICE0,
66#ifdef MAP_DEVICE1
67 MAP_DEVICE1,
68#endif
69#ifdef MAP_DEVICE2
70 MAP_DEVICE2,
71#endif
72 MAP_NS_DRAM0,
73 MAP_BL32_MEM,
74 {0}
75};
76#endif
Masahiro Yamada441bfdd2016-12-25 23:36:24 +090077#ifdef IMAGE_BL31
Jens Wiklander52c798e2015-12-07 14:37:10 +010078static const mmap_region_t plat_qemu_mmap[] = {
79 MAP_SHARED_RAM,
80 MAP_DEVICE0,
81#ifdef MAP_DEVICE1
82 MAP_DEVICE1,
83#endif
84 MAP_BL32_MEM,
85 {0}
86};
87#endif
Etienne Carriere911de8c2018-02-02 13:23:22 +010088#ifdef IMAGE_BL32
89static const mmap_region_t plat_qemu_mmap[] = {
90 MAP_SHARED_RAM,
91 MAP_DEVICE0,
92#ifdef MAP_DEVICE1
93 MAP_DEVICE1,
94#endif
95 {0}
96};
97#endif
Jens Wiklander52c798e2015-12-07 14:37:10 +010098
99/*******************************************************************************
100 * Macro generating the code for the function setting up the pagetables as per
101 * the platform memory map & initialize the mmu, for the given exception level
102 ******************************************************************************/
103
104#define DEFINE_CONFIGURE_MMU_EL(_el) \
Etienne Carriere911de8c2018-02-02 13:23:22 +0100105 void qemu_configure_mmu_##_el(unsigned long total_base, \
Jens Wiklander52c798e2015-12-07 14:37:10 +0100106 unsigned long total_size, \
Michalis Pappasba861122018-02-28 14:36:03 +0800107 unsigned long code_start, \
108 unsigned long code_limit, \
Jens Wiklander52c798e2015-12-07 14:37:10 +0100109 unsigned long ro_start, \
110 unsigned long ro_limit, \
111 unsigned long coh_start, \
112 unsigned long coh_limit) \
113 { \
114 mmap_add_region(total_base, total_base, \
115 total_size, \
116 MT_MEMORY | MT_RW | MT_SECURE); \
Michalis Pappasba861122018-02-28 14:36:03 +0800117 mmap_add_region(code_start, code_start, \
118 code_limit - code_start, \
119 MT_CODE | MT_SECURE); \
Jens Wiklander52c798e2015-12-07 14:37:10 +0100120 mmap_add_region(ro_start, ro_start, \
121 ro_limit - ro_start, \
Michalis Pappasba861122018-02-28 14:36:03 +0800122 MT_RO_DATA | MT_SECURE); \
Jens Wiklander52c798e2015-12-07 14:37:10 +0100123 mmap_add_region(coh_start, coh_start, \
124 coh_limit - coh_start, \
125 MT_DEVICE | MT_RW | MT_SECURE); \
126 mmap_add(plat_qemu_mmap); \
127 init_xlat_tables(); \
128 \
Etienne Carriere911de8c2018-02-02 13:23:22 +0100129 enable_mmu_##_el(0); \
Jens Wiklander52c798e2015-12-07 14:37:10 +0100130 }
131
132/* Define EL1 and EL3 variants of the function initialising the MMU */
Etienne Carriere911de8c2018-02-02 13:23:22 +0100133#ifdef AARCH32
Antonio Nino Diaz099b0b12018-09-26 09:29:45 +0100134DEFINE_CONFIGURE_MMU_EL(svc_mon)
Etienne Carriere911de8c2018-02-02 13:23:22 +0100135#else
136DEFINE_CONFIGURE_MMU_EL(el1)
137DEFINE_CONFIGURE_MMU_EL(el3)
138#endif
Jens Wiklander52c798e2015-12-07 14:37:10 +0100139
140