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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Achin Gupta4f6ad662013-10-25 09:08:21 +010031#include <assert.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010032#include <bl_common.h>
33#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010034#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010035#include <context.h>
Achin Guptaef7a28c2014-02-01 08:59:56 +000036#include <context_mgmt.h>
Achin Guptaf3ccbab2014-07-25 14:52:47 +010037#include <cpu_data.h>
Soby Mathew74e52a72014-10-02 16:56:51 +010038#include <debug.h>
Soby Mathew2ed46e92014-07-04 16:02:26 +010039#include <platform.h>
Dan Handleybcd60ba2014-04-17 18:53:42 +010040#include <runtime_svc.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010041#include <stddef.h>
Dan Handley714a0d22014-04-09 13:13:04 +010042#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010043
Soby Mathew74e52a72014-10-02 16:56:51 +010044typedef void (*afflvl_suspend_handler_t)(aff_map_node_t *node);
Achin Gupta4f6ad662013-10-25 09:08:21 +010045
46/*******************************************************************************
Achin Guptaf3ccbab2014-07-25 14:52:47 +010047 * This function saves the power state parameter passed in the current PSCI
48 * cpu_suspend call in the per-cpu data array.
Achin Guptaa45e3972013-12-05 15:10:48 +000049 ******************************************************************************/
Achin Guptaf3ccbab2014-07-25 14:52:47 +010050void psci_set_suspend_power_state(unsigned int power_state)
Achin Guptaa45e3972013-12-05 15:10:48 +000051{
Achin Guptaf3ccbab2014-07-25 14:52:47 +010052 set_cpu_data(psci_svc_cpu_data.power_state, power_state);
53 flush_cpu_data(psci_svc_cpu_data.power_state);
Achin Guptaa45e3972013-12-05 15:10:48 +000054}
55
56/*******************************************************************************
Achin Guptaf3ccbab2014-07-25 14:52:47 +010057 * This function gets the affinity level till which the current cpu could be
58 * powered down during a cpu_suspend call. Returns PSCI_INVALID_DATA if the
59 * power state is invalid.
Vikram Kanigirif100f412014-04-01 19:26:26 +010060 ******************************************************************************/
Achin Guptaf3ccbab2014-07-25 14:52:47 +010061int psci_get_suspend_afflvl()
Vikram Kanigirif100f412014-04-01 19:26:26 +010062{
Achin Guptaf3ccbab2014-07-25 14:52:47 +010063 unsigned int power_state;
Vikram Kanigirif100f412014-04-01 19:26:26 +010064
Achin Guptaf3ccbab2014-07-25 14:52:47 +010065 power_state = get_cpu_data(psci_svc_cpu_data.power_state);
Vikram Kanigirif100f412014-04-01 19:26:26 +010066
Achin Guptaf3ccbab2014-07-25 14:52:47 +010067 return ((power_state == PSCI_INVALID_DATA) ?
68 power_state : psci_get_pstate_afflvl(power_state));
Vikram Kanigirif100f412014-04-01 19:26:26 +010069}
70
Vikram Kanigirif100f412014-04-01 19:26:26 +010071/*******************************************************************************
Achin Guptaf3ccbab2014-07-25 14:52:47 +010072 * This function gets the state id of the current cpu from the power state
73 * parameter saved in the per-cpu data array. Returns PSCI_INVALID_DATA if the
74 * power state saved is invalid.
Vikram Kanigirif100f412014-04-01 19:26:26 +010075 ******************************************************************************/
Achin Guptaf3ccbab2014-07-25 14:52:47 +010076int psci_get_suspend_stateid()
Vikram Kanigirif100f412014-04-01 19:26:26 +010077{
78 unsigned int power_state;
79
Achin Guptaf3ccbab2014-07-25 14:52:47 +010080 power_state = get_cpu_data(psci_svc_cpu_data.power_state);
Vikram Kanigirif100f412014-04-01 19:26:26 +010081
Vikram Kanigirif100f412014-04-01 19:26:26 +010082 return ((power_state == PSCI_INVALID_DATA) ?
Achin Guptaf3ccbab2014-07-25 14:52:47 +010083 power_state : psci_get_pstate_id(power_state));
Vikram Kanigirif100f412014-04-01 19:26:26 +010084}
85
86/*******************************************************************************
Achin Guptaf3ccbab2014-07-25 14:52:47 +010087 * This function gets the state id of the cpu specified by the 'mpidr' parameter
88 * from the power state parameter saved in the per-cpu data array. Returns
89 * PSCI_INVALID_DATA if the power state saved is invalid.
Achin Guptaa45e3972013-12-05 15:10:48 +000090 ******************************************************************************/
Achin Guptaf3ccbab2014-07-25 14:52:47 +010091int psci_get_suspend_stateid_by_mpidr(unsigned long mpidr)
Achin Guptaa45e3972013-12-05 15:10:48 +000092{
Vikram Kanigirif100f412014-04-01 19:26:26 +010093 unsigned int power_state;
94
Achin Guptaf3ccbab2014-07-25 14:52:47 +010095 power_state = get_cpu_data_by_mpidr(mpidr,
96 psci_svc_cpu_data.power_state);
Vikram Kanigirif100f412014-04-01 19:26:26 +010097
Vikram Kanigirif100f412014-04-01 19:26:26 +010098 return ((power_state == PSCI_INVALID_DATA) ?
Achin Guptaf3ccbab2014-07-25 14:52:47 +010099 power_state : psci_get_pstate_id(power_state));
Achin Guptaa45e3972013-12-05 15:10:48 +0000100}
101
102/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100103 * The next three functions implement a handler for each supported affinity
104 * level which is called when that affinity level is about to be suspended.
105 ******************************************************************************/
Soby Mathew74e52a72014-10-02 16:56:51 +0100106static void psci_afflvl0_suspend(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100107{
Achin Guptae1aa5162014-06-26 09:58:52 +0100108 unsigned long psci_entrypoint;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100109
110 /* Sanity check to safeguard against data corruption */
111 assert(cpu_node->level == MPIDR_AFFLVL0);
112
Achin Gupta4f6ad662013-10-25 09:08:21 +0100113 /* Set the secure world (EL3) re-entry point after BL1 */
114 psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
115
116 /*
117 * Arch. management. Perform the necessary steps to flush all
118 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100119 */
Achin Guptae1aa5162014-06-26 09:58:52 +0100120 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100121
Soby Mathew74e52a72014-10-02 16:56:51 +0100122 assert(psci_plat_pm_ops->affinst_suspend);
Achin Gupta56bcdc22014-07-28 00:15:23 +0100123
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +0100125 * Plat. management: Allow the platform to perform the
126 * necessary actions to turn off this cpu e.g. set the
127 * platform defined mailbox with the psci entrypoint,
128 * program the power controller etc.
129 */
Soby Mathew74e52a72014-10-02 16:56:51 +0100130 psci_plat_pm_ops->affinst_suspend(psci_entrypoint,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100131 cpu_node->level,
132 psci_get_phys_state(cpu_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100133}
134
Soby Mathew74e52a72014-10-02 16:56:51 +0100135static void psci_afflvl1_suspend(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100136{
Achin Gupta4f6ad662013-10-25 09:08:21 +0100137 unsigned int plat_state;
138 unsigned long psci_entrypoint;
139
140 /* Sanity check the cluster level */
141 assert(cluster_node->level == MPIDR_AFFLVL1);
142
143 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +0100144 * Arch. management: Flush all levels of caches to PoC if the
Achin Guptaf6b9e992014-07-31 11:19:11 +0100145 * cluster is to be shutdown.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100146 */
Achin Guptaf6b9e992014-07-31 11:19:11 +0100147 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL1);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100148
Soby Mathew74e52a72014-10-02 16:56:51 +0100149 assert(psci_plat_pm_ops->affinst_suspend);
Achin Gupta56bcdc22014-07-28 00:15:23 +0100150
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151 /*
Achin Gupta56bcdc22014-07-28 00:15:23 +0100152 * Plat. Management. Allow the platform to do its cluster specific
153 * bookeeping e.g. turn off interconnect coherency, program the power
154 * controller etc. Sending the psci entrypoint is currently redundant
155 * beyond affinity level 0 but one never knows what a platform might
156 * do. Also it allows us to keep the platform handler prototype the
157 * same.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100158 */
Achin Gupta56bcdc22014-07-28 00:15:23 +0100159 plat_state = psci_get_phys_state(cluster_node);
160 psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
Soby Mathew74e52a72014-10-02 16:56:51 +0100161 psci_plat_pm_ops->affinst_suspend(psci_entrypoint,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100162 cluster_node->level,
163 plat_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100164}
165
166
Soby Mathew74e52a72014-10-02 16:56:51 +0100167static void psci_afflvl2_suspend(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100168{
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169 unsigned int plat_state;
170 unsigned long psci_entrypoint;
171
172 /* Cannot go beyond this */
173 assert(system_node->level == MPIDR_AFFLVL2);
174
175 /*
176 * Keep the physical state of the system handy to decide what
177 * action needs to be taken
178 */
Achin Gupta75f73672013-12-05 16:33:10 +0000179 plat_state = psci_get_phys_state(system_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100180
181 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100182 * Arch. management: Flush all levels of caches to PoC if the
183 * system is to be shutdown.
184 */
185 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL2);
186
187 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000188 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100189 * at this affinity level
190 */
Soby Mathew74e52a72014-10-02 16:56:51 +0100191 assert(psci_plat_pm_ops->affinst_suspend);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100192
Achin Gupta56bcdc22014-07-28 00:15:23 +0100193 /*
194 * Sending the psci entrypoint is currently redundant
195 * beyond affinity level 0 but one never knows what a
196 * platform might do. Also it allows us to keep the
197 * platform handler prototype the same.
198 */
199 plat_state = psci_get_phys_state(system_node);
200 psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
Soby Mathew74e52a72014-10-02 16:56:51 +0100201 psci_plat_pm_ops->affinst_suspend(psci_entrypoint,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100202 system_node->level,
203 plat_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100204}
205
Dan Handleye2712bc2014-04-10 15:37:22 +0100206static const afflvl_suspend_handler_t psci_afflvl_suspend_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207 psci_afflvl0_suspend,
208 psci_afflvl1_suspend,
209 psci_afflvl2_suspend,
210};
211
212/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000213 * This function takes an array of pointers to affinity instance nodes in the
214 * topology tree and calls the suspend handler for the corresponding affinity
215 * levels
216 ******************************************************************************/
Soby Mathew74e52a72014-10-02 16:56:51 +0100217static void psci_call_suspend_handlers(aff_map_node_t *mpidr_nodes[],
Achin Gupta0959db52013-12-02 17:33:04 +0000218 int start_afflvl,
Soby Mathewf5121572014-09-30 11:19:51 +0100219 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000220{
Soby Mathew74e52a72014-10-02 16:56:51 +0100221 int level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100222 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000223
224 for (level = start_afflvl; level <= end_afflvl; level++) {
225 node = mpidr_nodes[level];
226 if (node == NULL)
227 continue;
228
Soby Mathew74e52a72014-10-02 16:56:51 +0100229 psci_afflvl_suspend_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000230 }
Achin Gupta0959db52013-12-02 17:33:04 +0000231}
232
233/*******************************************************************************
234 * Top level handler which is called when a cpu wants to suspend its execution.
235 * It is assumed that along with turning the cpu off, higher affinity levels
236 * until the target affinity level will be turned off as well. It traverses
237 * through all the affinity levels performing generic, architectural, platform
238 * setup and state management e.g. for a cluster that's to be suspended, it will
239 * call the platform specific code which will disable coherency at the
240 * interconnect level if the cpu is the last in the cluster. For a cpu it could
241 * mean programming the power controller etc.
242 *
243 * The state of all the relevant affinity levels is changed prior to calling the
244 * affinity level specific handlers as their actions would depend upon the state
245 * the affinity level is about to enter.
246 *
247 * The affinity level specific handlers are called in ascending order i.e. from
248 * the lowest to the highest affinity level implemented by the platform because
249 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
250 * first.
Soby Mathew74e52a72014-10-02 16:56:51 +0100251 *
252 * All the required parameter checks are performed at the beginning and after
253 * the state transition has been done, no further error is expected and it
254 * is not possible to undo any of the actions taken beyond that point.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255 ******************************************************************************/
Soby Mathew74e52a72014-10-02 16:56:51 +0100256void psci_afflvl_suspend(entry_point_info_t *ep,
Achin Gupta0959db52013-12-02 17:33:04 +0000257 int start_afflvl,
258 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100259{
Dan Handleye2712bc2014-04-10 15:37:22 +0100260 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Guptaf6b9e992014-07-31 11:19:11 +0100261 unsigned int max_phys_off_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100262
Achin Gupta4f6ad662013-10-25 09:08:21 +0100263 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000264 * Collect the pointers to the nodes in the topology tree for
265 * each affinity instance in the mpidr. If this function does
266 * not return successfully then either the mpidr or the affinity
Soby Mathew74e52a72014-10-02 16:56:51 +0100267 * levels are incorrect. Either way, this an internal TF error
268 * therefore assert.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100269 */
Soby Mathew74e52a72014-10-02 16:56:51 +0100270 if (psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
271 start_afflvl, end_afflvl, mpidr_nodes) != PSCI_E_SUCCESS)
272 assert(0);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100273
274 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000275 * This function acquires the lock corresponding to each affinity
276 * level so that by the time all locks are taken, the system topology
277 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100278 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100279 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000280 end_afflvl,
281 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100282
Achin Guptacab78e42014-07-28 00:09:01 +0100283 /*
Soby Mathew74e52a72014-10-02 16:56:51 +0100284 * Call the cpu suspend handler registered by the Secure Payload
285 * Dispatcher to let it do any bookeeping. If the handler encounters an
286 * error, it's expected to assert within
287 */
288 if (psci_spd_pm && psci_spd_pm->svc_suspend)
289 psci_spd_pm->svc_suspend(0);
290
291 /*
Achin Guptacab78e42014-07-28 00:09:01 +0100292 * This function updates the state of each affinity instance
293 * corresponding to the mpidr in the range of affinity levels
294 * specified.
295 */
296 psci_do_afflvl_state_mgmt(start_afflvl,
297 end_afflvl,
298 mpidr_nodes,
299 PSCI_STATE_SUSPEND);
Achin Guptaf6b9e992014-07-31 11:19:11 +0100300
301 max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
302 end_afflvl,
303 mpidr_nodes);
304 assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
305
306 /* Stash the highest affinity level that will be turned off */
307 psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
308
Soby Mathew8595b872015-01-06 15:36:38 +0000309 /*
310 * Store the re-entry information for the non-secure world.
311 */
312 cm_init_context(read_mpidr_el1(), ep);
313
Achin Gupta0959db52013-12-02 17:33:04 +0000314 /* Perform generic, architecture and platform specific handling */
Soby Mathew74e52a72014-10-02 16:56:51 +0100315 psci_call_suspend_handlers(mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000316 start_afflvl,
Soby Mathewf5121572014-09-30 11:19:51 +0100317 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100318
319 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100320 * Invalidate the entry for the highest affinity level stashed earlier.
321 * This ensures that any reads of this variable outside the power
322 * up/down sequences return PSCI_INVALID_DATA.
323 */
324 psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
325
326 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000327 * Release the locks corresponding to each affinity level in the
328 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100329 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100330 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000331 end_afflvl,
332 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100333}
334
335/*******************************************************************************
336 * The following functions finish an earlier affinity suspend request. They
337 * are called by the common finisher routine in psci_common.c.
338 ******************************************************************************/
Soby Mathew74e52a72014-10-02 16:56:51 +0100339static void psci_afflvl0_suspend_finish(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100340{
Soby Mathew74e52a72014-10-02 16:56:51 +0100341 unsigned int plat_state, state;
Achin Gupta607084e2014-02-09 18:24:19 +0000342 int32_t suspend_level;
Soby Mathew2ed46e92014-07-04 16:02:26 +0100343 uint64_t counter_freq;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100344
345 assert(cpu_node->level == MPIDR_AFFLVL0);
346
Achin Gupta0959db52013-12-02 17:33:04 +0000347 /* Ensure we have been woken up from a suspended state */
Achin Gupta75f73672013-12-05 16:33:10 +0000348 state = psci_get_state(cpu_node);
Achin Gupta0959db52013-12-02 17:33:04 +0000349 assert(state == PSCI_STATE_SUSPEND);
350
Achin Gupta4f6ad662013-10-25 09:08:21 +0100351 /*
352 * Plat. management: Perform the platform specific actions
353 * before we change the state of the cpu e.g. enabling the
354 * gic or zeroing the mailbox register. If anything goes
355 * wrong then assert as there is no way to recover from this
356 * situation.
357 */
Soby Mathew74e52a72014-10-02 16:56:51 +0100358
359 assert(psci_plat_pm_ops->affinst_suspend_finish);
Achin Gupta0959db52013-12-02 17:33:04 +0000360
Soby Mathew74e52a72014-10-02 16:56:51 +0100361 /* Get the physical state of this cpu */
362 plat_state = get_phys_state(state);
363 psci_plat_pm_ops->affinst_suspend_finish(cpu_node->level,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100364 plat_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100365
Achin Gupta4f6ad662013-10-25 09:08:21 +0100366 /*
Achin Guptae1aa5162014-06-26 09:58:52 +0100367 * Arch. management: Enable the data cache, manage stack memory and
368 * restore the stashed EL3 architectural context from the 'cpu_context'
369 * structure for this cpu.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100370 */
Achin Guptae1aa5162014-06-26 09:58:52 +0100371 psci_do_pwrup_cache_maintenance();
Soby Mathew2ed46e92014-07-04 16:02:26 +0100372
373 /* Re-init the cntfrq_el0 register */
374 counter_freq = plat_get_syscnt_freq();
375 write_cntfrq_el0(counter_freq);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100376
377 /*
Achin Gupta607084e2014-02-09 18:24:19 +0000378 * Call the cpu suspend finish handler registered by the Secure Payload
379 * Dispatcher to let it do any bookeeping. If the handler encounters an
380 * error, it's expected to assert within
381 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000382 if (psci_spd_pm && psci_spd_pm->svc_suspend) {
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100383 suspend_level = psci_get_suspend_afflvl();
Vikram Kanigirif100f412014-04-01 19:26:26 +0100384 assert (suspend_level != PSCI_INVALID_DATA);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000385 psci_spd_pm->svc_suspend_finish(suspend_level);
Achin Gupta607084e2014-02-09 18:24:19 +0000386 }
387
Vikram Kanigirif100f412014-04-01 19:26:26 +0100388 /* Invalidate the suspend context for the node */
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100389 psci_set_suspend_power_state(PSCI_INVALID_DATA);
Vikram Kanigirif100f412014-04-01 19:26:26 +0100390
Achin Gupta607084e2014-02-09 18:24:19 +0000391 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +0100392 * Generic management: Now we just need to retrieve the
393 * information that we had stashed away during the suspend
Achin Gupta3140a9e2013-12-02 16:23:12 +0000394 * call to set this cpu on its way.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100395 */
Andrew Thoelke4e126072014-06-04 21:10:52 +0100396 cm_prepare_el3_exit(NON_SECURE);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100397
398 /* Clean caches before re-entering normal world */
399 dcsw_op_louis(DCCSW);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100400}
401
Soby Mathew74e52a72014-10-02 16:56:51 +0100402static void psci_afflvl1_suspend_finish(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100403{
Soby Mathew74e52a72014-10-02 16:56:51 +0100404 unsigned int plat_state;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100405
406 assert(cluster_node->level == MPIDR_AFFLVL1);
407
408 /*
409 * Plat. management: Perform the platform specific actions
410 * as per the old state of the cluster e.g. enabling
411 * coherency at the interconnect depends upon the state with
412 * which this cluster was powered up. If anything goes wrong
413 * then assert as there is no way to recover from this
414 * situation.
415 */
Achin Gupta0959db52013-12-02 17:33:04 +0000416
Soby Mathew74e52a72014-10-02 16:56:51 +0100417 assert(psci_plat_pm_ops->affinst_suspend_finish);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100418
Soby Mathew74e52a72014-10-02 16:56:51 +0100419 /* Get the physical state of this cpu */
420 plat_state = psci_get_phys_state(cluster_node);
421 psci_plat_pm_ops->affinst_suspend_finish(cluster_node->level,
422 plat_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100423}
424
425
Soby Mathew74e52a72014-10-02 16:56:51 +0100426static void psci_afflvl2_suspend_finish(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100427{
Soby Mathew74e52a72014-10-02 16:56:51 +0100428 unsigned int plat_state;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100429
430 /* Cannot go beyond this affinity level */
431 assert(system_node->level == MPIDR_AFFLVL2);
432
433 /*
434 * Currently, there are no architectural actions to perform
435 * at the system level.
436 */
437
438 /*
439 * Plat. management: Perform the platform specific actions
440 * as per the old state of the cluster e.g. enabling
441 * coherency at the interconnect depends upon the state with
442 * which this cluster was powered up. If anything goes wrong
443 * then assert as there is no way to recover from this
444 * situation.
445 */
Achin Gupta0959db52013-12-02 17:33:04 +0000446
Soby Mathew74e52a72014-10-02 16:56:51 +0100447 assert(psci_plat_pm_ops->affinst_suspend_finish);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100448
Soby Mathew74e52a72014-10-02 16:56:51 +0100449 /* Get the physical state of the system */
450 plat_state = psci_get_phys_state(system_node);
451 psci_plat_pm_ops->affinst_suspend_finish(system_node->level,
452 plat_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100453}
454
Dan Handleye2712bc2014-04-10 15:37:22 +0100455const afflvl_power_on_finisher_t psci_afflvl_suspend_finishers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100456 psci_afflvl0_suspend_finish,
457 psci_afflvl1_suspend_finish,
458 psci_afflvl2_suspend_finish,
459};