Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 1 | /* |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 2 | * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved. |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 7 | #include <assert.h> |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 8 | #include <cdefs.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 9 | #include <stdbool.h> |
| 10 | |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 11 | #include <arch.h> |
| 12 | #include <arch_helpers.h> |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 13 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 14 | #include <lib/el3_runtime/pubsub_events.h> |
| 15 | #include <lib/extensions/amu.h> |
| 16 | #include <lib/extensions/amu_private.h> |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 17 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 18 | #include <plat/common/platform.h> |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 19 | |
| 20 | static struct amu_ctx amu_ctxs[PLATFORM_CORE_COUNT]; |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 21 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 22 | static inline __unused uint32_t read_id_pfr0_amu(void) |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 23 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 24 | return (read_id_pfr0() >> ID_PFR0_AMU_SHIFT) & |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 25 | ID_PFR0_AMU_MASK; |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 26 | } |
| 27 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 28 | static inline __unused void write_hcptr_tam(uint32_t value) |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 29 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 30 | write_hcptr((read_hcptr() & ~TAM_BIT) | |
| 31 | ((value << TAM_SHIFT) & TAM_BIT)); |
| 32 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 33 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 34 | static inline __unused void write_amcr_cg1rz(uint32_t value) |
| 35 | { |
| 36 | write_amcr((read_amcr() & ~AMCR_CG1RZ_BIT) | |
| 37 | ((value << AMCR_CG1RZ_SHIFT) & AMCR_CG1RZ_BIT)); |
| 38 | } |
| 39 | |
| 40 | static inline __unused uint32_t read_amcfgr_ncg(void) |
| 41 | { |
| 42 | return (read_amcfgr() >> AMCFGR_NCG_SHIFT) & |
| 43 | AMCFGR_NCG_MASK; |
| 44 | } |
| 45 | |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 46 | static inline __unused uint32_t read_amcgcr_cg0nc(void) |
| 47 | { |
| 48 | return (read_amcgcr() >> AMCGCR_CG0NC_SHIFT) & |
| 49 | AMCGCR_CG0NC_MASK; |
| 50 | } |
| 51 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 52 | static inline __unused uint32_t read_amcgcr_cg1nc(void) |
| 53 | { |
| 54 | return (read_amcgcr() >> AMCGCR_CG1NC_SHIFT) & |
| 55 | AMCGCR_CG1NC_MASK; |
| 56 | } |
| 57 | |
| 58 | static inline __unused uint32_t read_amcntenset0_px(void) |
| 59 | { |
| 60 | return (read_amcntenset0() >> AMCNTENSET0_Pn_SHIFT) & |
| 61 | AMCNTENSET0_Pn_MASK; |
| 62 | } |
| 63 | |
| 64 | static inline __unused uint32_t read_amcntenset1_px(void) |
| 65 | { |
| 66 | return (read_amcntenset1() >> AMCNTENSET1_Pn_SHIFT) & |
| 67 | AMCNTENSET1_Pn_MASK; |
| 68 | } |
| 69 | |
| 70 | static inline __unused void write_amcntenset0_px(uint32_t px) |
| 71 | { |
| 72 | uint32_t value = read_amcntenset0(); |
| 73 | |
| 74 | value &= ~AMCNTENSET0_Pn_MASK; |
| 75 | value |= (px << AMCNTENSET0_Pn_SHIFT) & |
| 76 | AMCNTENSET0_Pn_MASK; |
| 77 | |
| 78 | write_amcntenset0(value); |
| 79 | } |
| 80 | |
| 81 | static inline __unused void write_amcntenset1_px(uint32_t px) |
| 82 | { |
| 83 | uint32_t value = read_amcntenset1(); |
| 84 | |
| 85 | value &= ~AMCNTENSET1_Pn_MASK; |
| 86 | value |= (px << AMCNTENSET1_Pn_SHIFT) & |
| 87 | AMCNTENSET1_Pn_MASK; |
| 88 | |
| 89 | write_amcntenset1(value); |
| 90 | } |
| 91 | |
| 92 | static inline __unused void write_amcntenclr0_px(uint32_t px) |
| 93 | { |
| 94 | uint32_t value = read_amcntenclr0(); |
| 95 | |
| 96 | value &= ~AMCNTENCLR0_Pn_MASK; |
| 97 | value |= (px << AMCNTENCLR0_Pn_SHIFT) & AMCNTENCLR0_Pn_MASK; |
| 98 | |
| 99 | write_amcntenclr0(value); |
| 100 | } |
| 101 | |
| 102 | static inline __unused void write_amcntenclr1_px(uint32_t px) |
| 103 | { |
| 104 | uint32_t value = read_amcntenclr1(); |
| 105 | |
| 106 | value &= ~AMCNTENCLR1_Pn_MASK; |
| 107 | value |= (px << AMCNTENCLR1_Pn_SHIFT) & AMCNTENCLR1_Pn_MASK; |
| 108 | |
| 109 | write_amcntenclr1(value); |
| 110 | } |
| 111 | |
| 112 | static bool amu_supported(void) |
| 113 | { |
| 114 | return read_id_pfr0_amu() >= ID_PFR0_AMU_V1; |
| 115 | } |
| 116 | |
| 117 | static bool amu_v1p1_supported(void) |
| 118 | { |
| 119 | return read_id_pfr0_amu() >= ID_PFR0_AMU_V1P1; |
| 120 | } |
| 121 | |
| 122 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
| 123 | static bool amu_group1_supported(void) |
| 124 | { |
| 125 | return read_amcfgr_ncg() > 0U; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 126 | } |
| 127 | #endif |
| 128 | |
| 129 | /* |
| 130 | * Enable counters. This function is meant to be invoked |
| 131 | * by the context management library before exiting from EL3. |
| 132 | */ |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 133 | void amu_enable(bool el2_unused) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 134 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 135 | if (!amu_supported()) { |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 136 | return; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 137 | } |
| 138 | |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 139 | if (el2_unused) { |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 140 | /* |
| 141 | * Non-secure access from EL0 or EL1 to the Activity Monitor |
| 142 | * registers do not trap to EL2. |
| 143 | */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 144 | write_hcptr_tam(0U); |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 145 | } |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 146 | |
| 147 | /* Enable group 0 counters */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 148 | write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 149 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 150 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 151 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 152 | /* Enable group 1 counters */ |
| 153 | write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK); |
| 154 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 155 | #endif |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 156 | |
| 157 | /* Initialize FEAT_AMUv1p1 features if present. */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 158 | if (!amu_v1p1_supported()) { |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 159 | return; |
| 160 | } |
| 161 | |
| 162 | #if AMU_RESTRICT_COUNTERS |
| 163 | /* |
| 164 | * FEAT_AMUv1p1 adds a register field to restrict access to group 1 |
| 165 | * counters at all but the highest implemented EL. This is controlled |
| 166 | * with the AMU_RESTRICT_COUNTERS compile time flag, when set, system |
| 167 | * register reads at lower ELs return zero. Reads from the memory |
| 168 | * mapped view are unaffected. |
| 169 | */ |
| 170 | VERBOSE("AMU group 1 counter access restricted.\n"); |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 171 | write_amcr_cg1rz(1U); |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 172 | #else |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 173 | write_amcr_cg1rz(0U); |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 174 | #endif |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | /* Read the group 0 counter identified by the given `idx`. */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 178 | static uint64_t amu_group0_cnt_read(unsigned int idx) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 179 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 180 | assert(amu_supported()); |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 181 | assert(idx < read_amcgcr_cg0nc()); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 182 | |
| 183 | return amu_group0_cnt_read_internal(idx); |
| 184 | } |
| 185 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 186 | /* Write the group 0 counter identified by the given `idx` with `val` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 187 | static void amu_group0_cnt_write(unsigned int idx, uint64_t val) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 188 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 189 | assert(amu_supported()); |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 190 | assert(idx < read_amcgcr_cg0nc()); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 191 | |
| 192 | amu_group0_cnt_write_internal(idx, val); |
| 193 | isb(); |
| 194 | } |
| 195 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 196 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 197 | /* Read the group 1 counter identified by the given `idx` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 198 | static uint64_t amu_group1_cnt_read(unsigned int idx) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 199 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 200 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 201 | assert(amu_group1_supported()); |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 202 | assert(idx < read_amcgcr_cg1nc()); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 203 | |
| 204 | return amu_group1_cnt_read_internal(idx); |
| 205 | } |
| 206 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 207 | /* Write the group 1 counter identified by the given `idx` with `val` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 208 | static void amu_group1_cnt_write(unsigned int idx, uint64_t val) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 209 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 210 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 211 | assert(amu_group1_supported()); |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 212 | assert(idx < read_amcgcr_cg1nc()); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 213 | |
| 214 | amu_group1_cnt_write_internal(idx, val); |
| 215 | isb(); |
| 216 | } |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 217 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 218 | |
| 219 | static void *amu_context_save(const void *arg) |
| 220 | { |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 221 | struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()]; |
| 222 | unsigned int i; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 223 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 224 | if (!amu_supported()) { |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 225 | return (void *)-1; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 226 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 227 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 228 | /* Assert that group 0/1 counter configuration is what we expect */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 229 | assert(read_amcntenset0_px() == |
| 230 | ((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U)); |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 231 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 232 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 233 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 234 | assert(read_amcntenset1_px() == AMU_GROUP1_COUNTERS_MASK); |
| 235 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 236 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 237 | /* |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 238 | * Disable group 0/1 counters to avoid other observers like SCP sampling |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 239 | * counter values from the future via the memory mapped view. |
| 240 | */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 241 | write_amcntenclr0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 242 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 243 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 244 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 245 | write_amcntenclr1_px(AMU_GROUP1_COUNTERS_MASK); |
| 246 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 247 | #endif |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 248 | |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 249 | isb(); |
| 250 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 251 | /* Save all group 0 counters */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 252 | for (i = 0U; i < read_amcgcr_cg0nc(); i++) { |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 253 | ctx->group0_cnts[i] = amu_group0_cnt_read(i); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 254 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 255 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 256 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 257 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 258 | /* Save group 1 counters */ |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 259 | for (i = 0U; i < read_amcgcr_cg1nc(); i++) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 260 | if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) { |
| 261 | ctx->group1_cnts[i] = amu_group1_cnt_read(i); |
| 262 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 263 | } |
| 264 | } |
| 265 | #endif |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 266 | |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 267 | return (void *)0; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | static void *amu_context_restore(const void *arg) |
| 271 | { |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 272 | struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()]; |
| 273 | unsigned int i; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 274 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 275 | if (!amu_supported()) { |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 276 | return (void *)-1; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 277 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 278 | |
| 279 | /* Counters were disabled in `amu_context_save()` */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame] | 280 | assert(read_amcntenset0_px() == 0U); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 281 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 282 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 283 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 284 | assert(read_amcntenset1_px() == 0U); |
| 285 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 286 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 287 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 288 | /* Restore all group 0 counters */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 289 | for (i = 0U; i < read_amcgcr_cg0nc(); i++) { |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 290 | amu_group0_cnt_write(i, ctx->group0_cnts[i]); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 291 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 292 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 293 | /* Restore group 0 counter configuration */ |
Chris Kay | a40141d | 2021-05-25 12:33:18 +0100 | [diff] [blame] | 294 | write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U); |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 295 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 296 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 297 | if (amu_group1_supported()) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 298 | /* Restore group 1 counters */ |
Chris Kay | da81914 | 2021-05-25 15:24:18 +0100 | [diff] [blame^] | 299 | for (i = 0U; i < read_amcgcr_cg1nc(); i++) { |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 300 | if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) { |
| 301 | amu_group1_cnt_write(i, ctx->group1_cnts[i]); |
| 302 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 303 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 304 | |
Chris Kay | 925fda4 | 2021-05-25 10:42:56 +0100 | [diff] [blame] | 305 | /* Restore group 1 counter configuration */ |
| 306 | write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK); |
| 307 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 308 | #endif |
| 309 | |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 310 | return (void *)0; |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 311 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 312 | |
| 313 | SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, amu_context_save); |
| 314 | SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, amu_context_restore); |