| developer | 0df1c3c | 2020-08-01 16:23:12 +0800 | [diff] [blame] | 1 | /* |
| developer | fe14b9f | 2022-09-05 11:18:04 +0800 | [diff] [blame] | 2 | * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. |
| developer | 0df1c3c | 2020-08-01 16:23:12 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef UART_H |
| 8 | #define UART_H |
| 9 | |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | /* UART HW information */ |
| 13 | #define HW_SUPPORT_UART_PORTS 2 |
| 14 | #define DRV_SUPPORT_UART_PORTS 2 |
| 15 | |
| 16 | /* console UART clock cg */ |
| 17 | #define UART_CLOCK_GATE_SET (INFRACFG_AO_BASE + 0x80) |
| 18 | #define UART_CLOCK_GATE_CLR (INFRACFG_AO_BASE + 0x84) |
| 19 | #define UART_CLOCK_GATE_STA (INFRACFG_AO_BASE + 0x90) |
| 20 | #define UART0_CLOCK_GATE_BIT (1U<<22) |
| 21 | #define UART1_CLOCK_GATE_BIT (1U<<23) |
| 22 | |
| 23 | /* UART registers */ |
| 24 | #define UART_RBR(_baseaddr) (_baseaddr + 0x0) |
| 25 | #define UART_THR(_baseaddr) (_baseaddr + 0x0) |
| 26 | #define UART_IER(_baseaddr) (_baseaddr + 0x4) |
| 27 | #define UART_IIR(_baseaddr) (_baseaddr + 0x8) |
| 28 | #define UART_FCR(_baseaddr) (_baseaddr + 0x8) |
| 29 | #define UART_LCR(_baseaddr) (_baseaddr + 0xc) |
| 30 | #define UART_MCR(_baseaddr) (_baseaddr + 0x10) |
| 31 | #define UART_LSR(_baseaddr) (_baseaddr + 0x14) |
| 32 | #define UART_MSR(_baseaddr) (_baseaddr + 0x18) |
| 33 | #define UART_SCR(_baseaddr) (_baseaddr + 0x1c) |
| 34 | #define UART_DLL(_baseaddr) (_baseaddr + 0x0) |
| 35 | #define UART_DLH(_baseaddr) (_baseaddr + 0x4) |
| 36 | #define UART_EFR(_baseaddr) (_baseaddr + 0x8) |
| 37 | #define UART_XON1(_baseaddr) (_baseaddr + 0x10) |
| 38 | #define UART_XON2(_baseaddr) (_baseaddr + 0x14) |
| 39 | #define UART_XOFF1(_baseaddr) (_baseaddr + 0x18) |
| 40 | #define UART_XOFF2(_baseaddr) (_baseaddr + 0x1c) |
| 41 | #define UART_AUTOBAUD(_baseaddr) (_baseaddr + 0x20) |
| 42 | #define UART_HIGHSPEED(_baseaddr) (_baseaddr + 0x24) |
| 43 | #define UART_SAMPLE_COUNT(_baseaddr) (_baseaddr + 0x28) |
| 44 | #define UART_SAMPLE_POINT(_baseaddr) (_baseaddr + 0x2c) |
| 45 | #define UART_AUTOBAUD_REG(_baseaddr) (_baseaddr + 0x30) |
| 46 | #define UART_RATE_FIX_REG(_baseaddr) (_baseaddr + 0x34) |
| 47 | #define UART_AUTO_BAUDSAMPLE(_baseaddr) (_baseaddr + 0x38) |
| 48 | #define UART_GUARD(_baseaddr) (_baseaddr + 0x3c) |
| 49 | #define UART_ESCAPE_DAT(_baseaddr) (_baseaddr + 0x40) |
| 50 | #define UART_ESCAPE_EN(_baseaddr) (_baseaddr + 0x44) |
| 51 | #define UART_SLEEP_EN(_baseaddr) (_baseaddr + 0x48) |
| 52 | #define UART_DMA_EN(_baseaddr) (_baseaddr + 0x4c) |
| 53 | #define UART_RXTRI_AD(_baseaddr) (_baseaddr + 0x50) |
| 54 | #define UART_FRACDIV_L(_baseaddr) (_baseaddr + 0x54) |
| 55 | #define UART_FRACDIV_M(_baseaddr) (_baseaddr + 0x58) |
| 56 | #define UART_FCR_RD(_baseaddr) (_baseaddr + 0x5C) |
| 57 | #define UART_USB_RX_SEL(_baseaddr) (_baseaddr + 0xB0) |
| 58 | #define UART_SLEEP_REQ(_baseaddr) (_baseaddr + 0xB4) |
| 59 | #define UART_SLEEP_ACK(_baseaddr) (_baseaddr + 0xB8) |
| 60 | #define UART_SPM_SEL(_baseaddr) (_baseaddr + 0xBC) |
| 61 | #define UART_LCR_DLAB 0x0080 |
| 62 | #define UART_LCR_MODE_B 0x00bf |
| 63 | |
| 64 | enum uart_port_ID { |
| 65 | UART_PORT0 = 0, |
| 66 | UART_PORT1 |
| 67 | }; |
| 68 | |
| 69 | struct mt_uart_register { |
| 70 | uint32_t dll; |
| 71 | uint32_t dlh; |
| 72 | uint32_t ier; |
| 73 | uint32_t lcr; |
| 74 | uint32_t mcr; |
| 75 | uint32_t fcr; |
| 76 | uint32_t lsr; |
| 77 | uint32_t scr; |
| 78 | uint32_t efr; |
| 79 | uint32_t highspeed; |
| 80 | uint32_t sample_count; |
| 81 | uint32_t sample_point; |
| 82 | uint32_t fracdiv_l; |
| 83 | uint32_t fracdiv_m; |
| 84 | uint32_t escape_en; |
| 85 | uint32_t guard; |
| 86 | uint32_t rx_sel; |
| 87 | }; |
| 88 | |
| 89 | struct mt_uart { |
| 90 | unsigned long base; |
| 91 | struct mt_uart_register registers; |
| 92 | }; |
| 93 | |
| 94 | /* external API */ |
| 95 | void mt_uart_save(void); |
| 96 | void mt_uart_restore(void); |
| 97 | void mt_console_uart_cg(int on); |
| 98 | uint32_t mt_console_uart_cg_status(void); |
| 99 | |
| 100 | #endif /* __UART_H__ */ |