blob: edf10188d339bb759a8ea746e4ed21a6c216c2c7 [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010033#include <assert.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010034#include <bl_common.h>
35#include <bl31.h>
Vikram Kanigiri9b38fc82015-01-29 18:27:38 +000036#include <cpu_data.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010037#include <platform.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * This duplicates what the primary cpu did after a cold boot in BL1. The same
41 * needs to be done when a cpu is hotplugged in. This function could also over-
42 * ride any EL3 setup done by BL1 as this code resides in rw memory.
43 ******************************************************************************/
44void bl31_arch_setup(void)
45{
Achin Guptaed1744e2014-08-04 23:13:10 +010046 /* Set the RES1 bits in the SCR_EL3 */
47 write_scr_el3(SCR_RES1_BITS);
Sandrine Bailleux37382742013-11-18 17:26:59 +000048
Sandrine Bailleux74c1a2a2014-03-31 10:44:09 +010049 /* Program the counter frequency */
Achin Gupta9f098352014-07-18 18:38:28 +010050 write_cntfrq_el0(plat_get_syscnt_freq());
Vikram Kanigiri9b38fc82015-01-29 18:27:38 +000051
52 /* Initialize the cpu_ops pointer. */
53 init_cpu_ops();
Achin Gupta4f6ad662013-10-25 09:08:21 +010054}