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Varun Wadekarb316e242015-05-19 16:48:04 +05301/*
Varun Wadekarb7b45752015-12-28 14:55:41 -08002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05303 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __TEGRA_PRIVATE_H__
32#define __TEGRA_PRIVATE_H__
33
Varun Wadekara78bb1b2015-08-07 10:03:00 +053034#include <arch.h>
Varun Wadekarb316e242015-05-19 16:48:04 +053035#include <platform_def.h>
Yatharth Kochar33f5c412015-12-09 14:22:47 +000036#include <psci.h>
Varun Wadekara78bb1b2015-08-07 10:03:00 +053037#include <xlat_tables.h>
Varun Wadekarb316e242015-05-19 16:48:04 +053038
Varun Wadekar7a269e22015-06-10 14:04:32 +053039/*******************************************************************************
40 * Tegra DRAM memory base address
41 ******************************************************************************/
42#define TEGRA_DRAM_BASE 0x80000000
43#define TEGRA_DRAM_END 0x27FFFFFFF
44
Varun Wadekarb7b45752015-12-28 14:55:41 -080045/*******************************************************************************
46 * Struct for parameters received from BL2
47 ******************************************************************************/
Varun Wadekarb316e242015-05-19 16:48:04 +053048typedef struct plat_params_from_bl2 {
Varun Wadekar6bb62462015-10-06 12:49:31 +053049 /* TZ memory size */
Varun Wadekarb316e242015-05-19 16:48:04 +053050 uint64_t tzdram_size;
Varun Wadekar6bb62462015-10-06 12:49:31 +053051 /* TZ memory base */
52 uint64_t tzdram_base;
Varun Wadekard2014c62015-10-29 10:37:28 +053053 /* UART port ID */
54 int uart_id;
Varun Wadekarb316e242015-05-19 16:48:04 +053055} plat_params_from_bl2_t;
56
Varun Wadekardc799302015-12-28 16:36:42 -080057/*******************************************************************************
58 * Per-CPU struct describing FIQ state to be stored
59 ******************************************************************************/
60typedef struct pcpu_fiq_state {
61 uint64_t elr_el3;
62 uint64_t spsr_el3;
63} pcpu_fiq_state_t;
64
Varun Wadekarc6c386d2016-05-20 16:21:22 -070065/*******************************************************************************
66 * Struct describing per-FIQ configuration settings
67 ******************************************************************************/
68typedef struct irq_sec_cfg {
69 /* IRQ number */
70 unsigned int irq;
71 /* Target CPUs servicing this interrupt */
72 unsigned int target_cpus;
73 /* type = INTR_TYPE_S_EL1 or INTR_TYPE_EL3 */
74 uint32_t type;
75} irq_sec_cfg_t;
76
Varun Wadekar254441d2015-07-23 10:07:54 +053077/* Declarations for plat_psci_handlers.c */
Varun Wadekara78bb1b2015-08-07 10:03:00 +053078int32_t tegra_soc_validate_power_state(unsigned int power_state,
79 psci_power_state_t *req_state);
Varun Wadekar254441d2015-07-23 10:07:54 +053080
Varun Wadekarb316e242015-05-19 16:48:04 +053081/* Declarations for plat_setup.c */
82const mmap_region_t *plat_get_mmio_map(void);
Varun Wadekard2014c62015-10-29 10:37:28 +053083uint32_t plat_get_console_from_id(int id);
Varun Wadekarb7b45752015-12-28 14:55:41 -080084void plat_gic_setup(void);
Varun Wadekard22d4ad2016-05-23 11:41:07 -070085bl31_params_t *plat_get_bl31_params(void);
86plat_params_from_bl2_t *plat_get_bl31_plat_params(void);
Varun Wadekarb316e242015-05-19 16:48:04 +053087
88/* Declarations for plat_secondary.c */
89void plat_secondary_setup(void);
90int plat_lock_cpu_vectors(void);
91
Varun Wadekardc799302015-12-28 16:36:42 -080092/* Declarations for tegra_fiq_glue.c */
93void tegra_fiq_handler_setup(void);
94int tegra_fiq_get_intr_context(void);
95void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint);
96
Varun Wadekarb316e242015-05-19 16:48:04 +053097/* Declarations for tegra_gic.c */
Varun Wadekarc6c386d2016-05-20 16:21:22 -070098void tegra_gic_setup(const irq_sec_cfg_t *irq_sec_ptr, unsigned int num_irqs);
Varun Wadekarb316e242015-05-19 16:48:04 +053099void tegra_gic_cpuif_deactivate(void);
100
101/* Declarations for tegra_security.c */
102void tegra_security_setup(void);
103void tegra_security_setup_videomem(uintptr_t base, uint64_t size);
104
105/* Declarations for tegra_pm.c */
106void tegra_pm_system_suspend_entry(void);
107void tegra_pm_system_suspend_exit(void);
108int tegra_system_suspended(void);
109
110/* Declarations for tegraXXX_pm.c */
111int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl);
112int tegra_prepare_cpu_on_finish(unsigned long mpidr);
113
114/* Declarations for tegra_bl31_setup.c */
115plat_params_from_bl2_t *bl31_get_plat_params(void);
Varun Wadekar7a269e22015-06-10 14:04:32 +0530116int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
Varun Wadekar3f0a8ad2016-03-28 15:56:47 -0700117void plat_early_platform_setup(void);
Varun Wadekarb316e242015-05-19 16:48:04 +0530118
Varun Wadekarbc74fec2015-07-16 15:47:03 +0530119/* Declarations for tegra_delay_timer.c */
120void tegra_delay_timer_init(void);
121
Varun Wadekarb316e242015-05-19 16:48:04 +0530122#endif /* __TEGRA_PRIVATE_H__ */