| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 1 | # |
| Pritesh Raithatha | 9eb5db5 | 2017-01-02 19:42:31 +0530 | [diff] [blame] | 2 | # Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 3 | # |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | # SPDX-License-Identifier: BSD-3-Clause |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 5 | # |
| 6 | |
| 7 | # platform configs |
| Varun Wadekar | 4c7fa50 | 2016-12-13 13:13:42 -0800 | [diff] [blame] | 8 | ENABLE_AFI_DEVICE := 1 |
| 9 | $(eval $(call add_define,ENABLE_AFI_DEVICE)) |
| 10 | |
| Varun Wadekar | a0f2697 | 2016-03-11 17:18:51 -0800 | [diff] [blame] | 11 | ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1 |
| 12 | $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS)) |
| 13 | |
| Varun Wadekar | ad2824f | 2016-03-28 13:44:35 -0700 | [diff] [blame] | 14 | ENABLE_CHIP_VERIFICATION_HARNESS := 0 |
| 15 | $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS)) |
| 16 | |
| Varun Wadekar | 94701ff | 2016-05-23 11:47:34 -0700 | [diff] [blame] | 17 | RESET_TO_BL31 := 1 |
| 18 | |
| 19 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 20 | |
| 21 | COLD_BOOT_SINGLE_CPU := 1 |
| 22 | |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 23 | # platform settings |
| Varun Wadekar | 94d8532 | 2015-11-30 12:05:04 -0800 | [diff] [blame] | 24 | TZDRAM_BASE := 0x30000000 |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 25 | $(eval $(call add_define,TZDRAM_BASE)) |
| 26 | |
| 27 | PLATFORM_CLUSTER_COUNT := 2 |
| 28 | $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) |
| 29 | |
| 30 | PLATFORM_MAX_CPUS_PER_CLUSTER := 4 |
| 31 | $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) |
| 32 | |
| Varun Wadekar | d64db96 | 2016-09-23 14:28:16 -0700 | [diff] [blame] | 33 | MAX_XLAT_TABLES := 24 |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 34 | $(eval $(call add_define,MAX_XLAT_TABLES)) |
| 35 | |
| Varun Wadekar | d64db96 | 2016-09-23 14:28:16 -0700 | [diff] [blame] | 36 | MAX_MMAP_REGIONS := 24 |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 37 | $(eval $(call add_define,MAX_MMAP_REGIONS)) |
| 38 | |
| 39 | # platform files |
| 40 | PLAT_INCLUDES += -I${SOC_DIR}/drivers/include |
| 41 | |
| Varun Wadekar | 50a3303 | 2017-11-15 15:46:38 -0800 | [diff] [blame] | 42 | BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \ |
| 43 | lib/cpus/aarch64/denver.S \ |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 44 | lib/cpus/aarch64/cortex_a57.S \ |
| Varun Wadekar | ee25e82 | 2017-06-28 14:38:19 -0700 | [diff] [blame] | 45 | ${COMMON_DIR}/drivers/gpcdma/gpcdma.c \ |
| Pritesh Raithatha | c88654f | 2017-01-02 20:11:32 +0530 | [diff] [blame] | 46 | ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \ |
| Varun Wadekar | bd2b414 | 2016-12-12 16:46:44 -0800 | [diff] [blame] | 47 | ${COMMON_DIR}/drivers/smmu/smmu.c \ |
| Varun Wadekar | a0352ab | 2017-03-14 14:24:35 -0700 | [diff] [blame] | 48 | ${SOC_DIR}/drivers/mce/mce.c \ |
| 49 | ${SOC_DIR}/drivers/mce/ari.c \ |
| 50 | ${SOC_DIR}/drivers/mce/nvg.c \ |
| 51 | ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \ |
| Pritesh Raithatha | 9eb5db5 | 2017-01-02 19:42:31 +0530 | [diff] [blame] | 52 | ${SOC_DIR}/plat_memctrl.c \ |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 53 | ${SOC_DIR}/plat_psci_handlers.c \ |
| 54 | ${SOC_DIR}/plat_setup.c \ |
| 55 | ${SOC_DIR}/plat_secondary.c \ |
| Varun Wadekar | 93bed2a | 2016-03-18 13:07:33 -0700 | [diff] [blame] | 56 | ${SOC_DIR}/plat_sip_calls.c \ |
| Pritesh Raithatha | c88654f | 2017-01-02 20:11:32 +0530 | [diff] [blame] | 57 | ${SOC_DIR}/plat_smmu.c \ |
| Varun Wadekar | 93bed2a | 2016-03-18 13:07:33 -0700 | [diff] [blame] | 58 | ${SOC_DIR}/plat_trampoline.S |
| Pritesh Raithatha | 9eb5db5 | 2017-01-02 19:42:31 +0530 | [diff] [blame] | 59 | |
| Varun Wadekar | b01d3bb | 2017-07-25 13:29:52 -0700 | [diff] [blame] | 60 | # Enable workarounds for selected Cortex-A57 erratas. |
| 61 | A57_DISABLE_NON_TEMPORAL_HINT := 1 |
| 62 | ERRATA_A57_806969 := 1 |
| 63 | ERRATA_A57_813419 := 1 |
| 64 | ERRATA_A57_813420 := 1 |
| 65 | ERRATA_A57_826974 := 1 |
| 66 | ERRATA_A57_826977 := 1 |
| 67 | ERRATA_A57_828024 := 1 |
| 68 | ERRATA_A57_829520 := 1 |
| 69 | ERRATA_A57_833471 := 1 |