Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #ifndef __BOARD_ARM_DEF_H__ |
| 31 | #define __BOARD_ARM_DEF_H__ |
| 32 | |
| 33 | #include <v2m_def.h> |
| 34 | |
| 35 | |
| 36 | /* |
| 37 | * Required platform porting definitions common to all ARM |
| 38 | * development platforms |
| 39 | */ |
| 40 | |
| 41 | /* Size of cacheable stacks */ |
| 42 | #if DEBUG_XLAT_TABLE |
| 43 | # define PLATFORM_STACK_SIZE 0x800 |
| 44 | #elif IMAGE_BL1 |
| 45 | #if TRUSTED_BOARD_BOOT |
| 46 | # define PLATFORM_STACK_SIZE 0x1000 |
| 47 | #else |
| 48 | # define PLATFORM_STACK_SIZE 0x440 |
| 49 | #endif |
| 50 | #elif IMAGE_BL2 |
| 51 | # if TRUSTED_BOARD_BOOT |
| 52 | # define PLATFORM_STACK_SIZE 0x1000 |
| 53 | # else |
| 54 | # define PLATFORM_STACK_SIZE 0x400 |
| 55 | # endif |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 56 | #elif IMAGE_BL2U |
| 57 | # define PLATFORM_STACK_SIZE 0x200 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 58 | #elif IMAGE_BL31 |
| 59 | # define PLATFORM_STACK_SIZE 0x400 |
| 60 | #elif IMAGE_BL32 |
| 61 | # define PLATFORM_STACK_SIZE 0x440 |
| 62 | #endif |
| 63 | |
| 64 | /* |
| 65 | * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the |
| 66 | * plat_arm_mmap array defined for each BL stage. |
| 67 | */ |
| 68 | #if IMAGE_BL1 |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 69 | # if PLAT_fvp |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 70 | # if TRUSTED_BOARD_BOOT |
| 71 | # define PLAT_ARM_MMAP_ENTRIES 8 |
| 72 | # else |
| 73 | # define PLAT_ARM_MMAP_ENTRIES 7 |
| 74 | # endif /* TRUSTED_BOARD_BOOT */ |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 75 | # else |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 76 | # if TRUSTED_BOARD_BOOT |
| 77 | # define PLAT_ARM_MMAP_ENTRIES 7 |
| 78 | # else |
| 79 | # define PLAT_ARM_MMAP_ENTRIES 6 |
| 80 | # endif /* TRUSTED_BOARD_BOOT */ |
| 81 | # endif /* PLAT_ */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 82 | #endif |
| 83 | #if IMAGE_BL2 |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 84 | # if PLAT_fvp |
| 85 | # define PLAT_ARM_MMAP_ENTRIES 9 |
| 86 | # else |
| 87 | # define PLAT_ARM_MMAP_ENTRIES 8 |
| 88 | # endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 89 | #endif |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 90 | #if IMAGE_BL2U |
| 91 | # if PLAT_fvp |
| 92 | # define PLAT_ARM_MMAP_ENTRIES 3 |
| 93 | # else |
| 94 | # define PLAT_ARM_MMAP_ENTRIES 4 |
| 95 | #endif |
| 96 | #endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 97 | #if IMAGE_BL31 |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 98 | #define PLAT_ARM_MMAP_ENTRIES 5 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 99 | #endif |
| 100 | #if IMAGE_BL32 |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 101 | #define PLAT_ARM_MMAP_ENTRIES 4 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 102 | #endif |
| 103 | |
| 104 | /* |
| 105 | * Platform specific page table and MMU setup constants |
| 106 | */ |
| 107 | #if IMAGE_BL1 |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 108 | # if TRUSTED_BOARD_BOOT |
| 109 | # define MAX_XLAT_TABLES 4 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 110 | # else |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 111 | # if PLAT_juno |
| 112 | # define MAX_XLAT_TABLES 2 |
| 113 | # else |
| 114 | # define MAX_XLAT_TABLES 3 |
| 115 | # endif /* PLAT_ */ |
| 116 | # endif /* TRUSTED_BOARD_BOOT */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 117 | #elif IMAGE_BL2 |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 118 | # if PLAT_juno |
| 119 | # define MAX_XLAT_TABLES 3 |
| 120 | # else |
| 121 | # define MAX_XLAT_TABLES 4 |
| 122 | # endif /* PLAT_ */ |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 123 | #elif IMAGE_BL2U |
| 124 | # if PLAT_juno |
| 125 | # define MAX_XLAT_TABLES 3 |
| 126 | # else |
| 127 | # define MAX_XLAT_TABLES 4 |
| 128 | # endif /* PLAT_ */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 129 | #elif IMAGE_BL31 |
| 130 | # define MAX_XLAT_TABLES 2 |
| 131 | #elif IMAGE_BL32 |
| 132 | # if ARM_TSP_RAM_LOCATION_ID == ARM_DRAM_ID |
| 133 | # define MAX_XLAT_TABLES 3 |
| 134 | # else |
| 135 | # define MAX_XLAT_TABLES 2 |
| 136 | # endif |
| 137 | #endif |
| 138 | |
| 139 | |
| 140 | #define MAX_IO_DEVICES 3 |
| 141 | #define MAX_IO_HANDLES 4 |
| 142 | |
| 143 | #define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ |
| 144 | |
| 145 | #define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE |
| 146 | #define PLAT_ARM_FIP_MAX_SIZE V2M_FLASH0_SIZE |
| 147 | |
| 148 | |
| 149 | #endif /* __BOARD_ARM_DEF_H__ */ |