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Konstantin Porotchkine7be6e22018-10-08 16:53:09 +03001/*
2 * Copyright (C) 2018 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
6 */
7
8#include <asm_macros.S>
9#include <platform_def.h>
10
11 .globl plat_secondary_cold_boot_setup
12 .globl plat_get_my_entrypoint
13 .globl plat_is_my_cpu_primary
14
15 /* -----------------------------------------------------
16 * void plat_secondary_cold_boot_setup (void);
17 *
18 * This function performs any platform specific actions
19 * needed for a secondary cpu after a cold reset. Right
20 * now this is a stub function.
21 * -----------------------------------------------------
22 */
23func plat_secondary_cold_boot_setup
24 mov x0, #0
25 ret
26endfunc plat_secondary_cold_boot_setup
27
28 /* ---------------------------------------------------------------------
29 * unsigned long plat_get_my_entrypoint (void);
30 *
31 * Main job of this routine is to distinguish between cold and warm boot
32 * For a cold boot, return 0.
33 * For a warm boot, read the mailbox and return the address it contains.
34 * A magic number is placed before entrypoint to avoid mistake caused by
35 * uninitialized mailbox data area.
36 * ---------------------------------------------------------------------
37 */
38func plat_get_my_entrypoint
39 /* Read first word and compare it with magic num */
40 mov_imm x0, PLAT_MARVELL_MAILBOX_BASE
41 ldr x1, [x0]
42 mov_imm x2, PLAT_MARVELL_MAILBOX_MAGIC_NUM
43 cmp x1, x2
44 /* If compare failed, return 0, i.e. cold boot */
45 beq entrypoint
46 mov x0, #0
47 ret
48entrypoint:
49 /* Second word contains the jump address */
50 add x0, x0, #8
51 ldr x0, [x0]
52 ret
53endfunc plat_get_my_entrypoint
54
55 /* -----------------------------------------------------
56 * unsigned int plat_is_my_cpu_primary (void);
57 *
58 * Find out whether the current cpu is the primary
59 * cpu.
60 * -----------------------------------------------------
61 */
62func plat_is_my_cpu_primary
63 mrs x0, mpidr_el1
64 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
65 cmp x0, #MVEBU_PRIMARY_CPU
66 cset w0, eq
67 ret
68endfunc plat_is_my_cpu_primary