| Heiko Stuebner | 9dc2833 | 2019-03-14 22:11:34 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <platform_def.h> |
| 10 | |
| 11 | .globl pmu_cpuson_entrypoint |
| 12 | .macro pmusram_entry_func _name |
| 13 | .section .pmusram.entry, "ax" |
| 14 | .type \_name, %function |
| 15 | .cfi_startproc |
| 16 | \_name: |
| 17 | .endm |
| 18 | |
| 19 | pmusram_entry_func pmu_cpuson_entrypoint |
| 20 | |
| 21 | #if PSRAM_CHECK_WAKEUP_CPU |
| 22 | check_wake_cpus: |
| 23 | ldcopr r0, MPIDR |
| 24 | and r1, r0, #MPIDR_CPU_MASK |
| 25 | #ifdef PLAT_RK_MPIDR_CLUSTER_MASK |
| 26 | and r0, r0, #PLAT_RK_MPIDR_CLUSTER_MASK |
| 27 | #else |
| 28 | and r0, r0, #MPIDR_CLUSTER_MASK |
| 29 | #endif |
| 30 | orr r0, r0, r1 |
| 31 | |
| 32 | /* primary_cpu */ |
| 33 | ldr r1, boot_mpidr |
| 34 | cmp r0, r1 |
| 35 | beq sys_wakeup |
| 36 | |
| 37 | /* |
| 38 | * If the core is not the primary cpu, |
| 39 | * force the core into wfe. |
| 40 | */ |
| 41 | wfe_loop: |
| 42 | wfe |
| 43 | b wfe_loop |
| 44 | sys_wakeup: |
| 45 | #endif |
| 46 | |
| 47 | #if PSRAM_DO_DDR_RESUME |
| 48 | ddr_resume: |
| 49 | ldr r2, =__bl32_sram_stack_end |
| 50 | mov sp, r2 |
| 51 | bl dmc_resume |
| 52 | #endif |
| 53 | bl sram_restore |
| 54 | sys_resume: |
| 55 | bl sp_min_warm_entrypoint |
| 56 | endfunc pmu_cpuson_entrypoint |