Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 7 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | |
| 9 | #include <common/bl_common.h> |
| 10 | #include <common/interrupt_props.h> |
| 11 | #include <drivers/arm/gicv2.h> |
| 12 | #include <lib/utils.h> |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 13 | |
| 14 | /****************************************************************************** |
| 15 | * The following functions are defined as weak to allow a platform to override |
| 16 | * the way the GICv2 driver is initialised and used. |
| 17 | *****************************************************************************/ |
| 18 | #pragma weak plat_rockchip_gic_driver_init |
| 19 | #pragma weak plat_rockchip_gic_init |
| 20 | #pragma weak plat_rockchip_gic_cpuif_enable |
| 21 | #pragma weak plat_rockchip_gic_cpuif_disable |
| 22 | #pragma weak plat_rockchip_gic_pcpu_init |
| 23 | |
| 24 | /****************************************************************************** |
| 25 | * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 |
| 26 | * interrupts. |
| 27 | *****************************************************************************/ |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 28 | static const interrupt_prop_t g0_interrupt_props[] = { |
| 29 | PLAT_RK_GICV2_G1S_IRQS |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 30 | }; |
| 31 | |
| 32 | /* |
| 33 | * Ideally `rockchip_gic_data` structure definition should be a `const` but it |
| 34 | * is kept as modifiable for overwriting with different GICD and GICC base when |
| 35 | * running on FVP with VE memory map. |
| 36 | */ |
| 37 | gicv2_driver_data_t rockchip_gic_data = { |
| 38 | .gicd_base = PLAT_RK_GICD_BASE, |
| 39 | .gicc_base = PLAT_RK_GICC_BASE, |
Antonio Nino Diaz | 5823090 | 2018-09-24 17:16:20 +0100 | [diff] [blame] | 40 | .interrupt_props = g0_interrupt_props, |
| 41 | .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), |
Tony Xie | f6118cc | 2016-01-15 17:17:32 +0800 | [diff] [blame] | 42 | }; |
| 43 | |
| 44 | /****************************************************************************** |
| 45 | * RockChip common helper to initialize the GICv2 only driver. |
| 46 | *****************************************************************************/ |
| 47 | void plat_rockchip_gic_driver_init(void) |
| 48 | { |
| 49 | gicv2_driver_init(&rockchip_gic_data); |
| 50 | } |
| 51 | |
| 52 | void plat_rockchip_gic_init(void) |
| 53 | { |
| 54 | gicv2_distif_init(); |
| 55 | gicv2_pcpu_distif_init(); |
| 56 | gicv2_cpuif_enable(); |
| 57 | } |
| 58 | |
| 59 | /****************************************************************************** |
| 60 | * RockChip common helper to enable the GICv2 CPU interface |
| 61 | *****************************************************************************/ |
| 62 | void plat_rockchip_gic_cpuif_enable(void) |
| 63 | { |
| 64 | gicv2_cpuif_enable(); |
| 65 | } |
| 66 | |
| 67 | /****************************************************************************** |
| 68 | * RockChip common helper to disable the GICv2 CPU interface |
| 69 | *****************************************************************************/ |
| 70 | void plat_rockchip_gic_cpuif_disable(void) |
| 71 | { |
| 72 | gicv2_cpuif_disable(); |
| 73 | } |
| 74 | |
| 75 | /****************************************************************************** |
| 76 | * RockChip common helper to initialize the per cpu distributor interface |
| 77 | * in GICv2 |
| 78 | *****************************************************************************/ |
| 79 | void plat_rockchip_gic_pcpu_init(void) |
| 80 | { |
| 81 | gicv2_pcpu_distif_init(); |
| 82 | } |