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Caesar Wangd90f43e2016-10-11 09:36:00 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __ROCKCHIP_PLAT_LD_S__
31#define __ROCKCHIP_PLAT_LD_S__
32
33MEMORY {
34 SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE
35}
36
37SECTIONS
38{
39 . = SRAM_BASE;
40 ASSERT(. == ALIGN(4096),
41 "SRAM_BASE address is not aligned on a page boundary.")
42
43 /*
44 * The SRAM space allocation for RK3399
45 * ----------------
Caesar Wangb4003742016-10-12 08:10:12 +080046 * | m0 code bin
47 * ----------------
Caesar Wangd90f43e2016-10-11 09:36:00 +080048 * | sram text
49 * ----------------
50 * | sram data
51 * ----------------
52 */
Caesar Wangb4003742016-10-12 08:10:12 +080053 .incbin_sram : ALIGN(4096) {
54 __sram_incbin_start = .;
55 *(.sram.incbin)
56 . = ALIGN(4096);
57 __sram_incbin_end = .;
58 } >SRAM
59
Caesar Wangd90f43e2016-10-11 09:36:00 +080060 .text_sram : ALIGN(4096) {
61 __bl31_sram_text_start = .;
62 *(.sram.text)
63 *(.sram.rodata)
64 . = ALIGN(4096);
65 __bl31_sram_text_end = .;
66 } >SRAM
67
68 .data_sram : ALIGN(4096) {
69 __bl31_sram_data_start = .;
70 *(.sram.data)
71 . = ALIGN(4096);
72 __bl31_sram_data_end = .;
73 } >SRAM
74}
75
76#endif /* __ROCKCHIP_PLAT_LD_S__ */