Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 1 | Xilinx Versal |
| 2 | ============= |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 3 | |
| 4 | Trusted Firmware-A implements the EL3 firmware layer for Xilinx Versal. |
| 5 | The platform only uses the runtime part of TF-A as Xilinx Versal already has a |
| 6 | BootROM (BL1) and PMC FW (BL2). |
| 7 | |
| 8 | BL31 is TF-A. |
| 9 | BL32 is an optional Secure Payload. |
| 10 | BL33 is the non-secure world software (U-Boot, Linux etc). |
| 11 | |
| 12 | To build: |
| 13 | ```bash |
| 14 | make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 |
| 15 | ``` |
| 16 | |
Siva Durga Prasad Paladugu | cbc9005 | 2019-07-10 16:15:19 +0530 | [diff] [blame] | 17 | To build ATF for different platform (supported are "silicon"(default) and "versal_virt") |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 18 | ```bash |
| 19 | make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31 |
| 20 | ``` |
| 21 | |
Prasad Kummari | c3c86dd | 2023-10-29 13:41:37 +0530 | [diff] [blame] | 22 | To build bl32 TSP you have to rebuild bl31 too |
| 23 | ```bash |
| 24 | make CROSS_COMPILE=aarch64-none-elf- PLAT=versal SPD=tspd RESET_TO_BL31=1 bl31 bl32 |
| 25 | ``` |
| 26 | |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 27 | To build TF-A for JTAG DCC console |
| 28 | ```bash |
| 29 | make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 VERSAL_CONSOLE=dcc |
| 30 | ``` |
| 31 | |
Prasad Kummari | 0acb82f | 2023-12-19 15:15:25 +0530 | [diff] [blame] | 32 | To build TF-A with Errata management interface |
| 33 | ```bash |
| 34 | make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 ERRATA_ABI_SUPPORT=1 |
| 35 | ``` |
| 36 | |
Venkatesh Yadav Abbarapu | 82252a4 | 2021-07-20 22:27:32 -0600 | [diff] [blame] | 37 | To build TF-A with Straight-Line Speculation(SLS) |
| 38 | ```bash |
| 39 | make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 HARDEN_SLS_ALL=1 |
| 40 | ``` |
| 41 | |
Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 42 | Xilinx Versal platform specific build options |
| 43 | --------------------------------------------- |
| 44 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 45 | * `VERSAL_ATF_MEM_BASE`: Specifies the base address of the bl31 binary. |
| 46 | * `VERSAL_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary. |
| 47 | * `VERSAL_BL32_MEM_BASE`: Specifies the base address of the bl32 binary. |
| 48 | * `VERSAL_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary. |
| 49 | |
| 50 | * `VERSAL_CONSOLE`: Select the console driver. Options: |
| 51 | - `pl011`, `pl011_0`: ARM pl011 UART 0 |
| 52 | - `pl011_1` : ARM pl011 UART 1 |
| 53 | |
| 54 | * `VERSAL_PLATFORM`: Select the platform. Options: |
| 55 | - `versal_virt` : Versal Virtual platform |
Venkatesh Yadav Abbarapu | 9c3b77b | 2022-04-13 09:04:53 +0530 | [diff] [blame] | 56 | - `spp_itr6` : SPP ITR6 |
Venkatesh Yadav Abbarapu | 1d6d9dd | 2022-05-11 13:46:28 +0530 | [diff] [blame] | 57 | - `emu_itr6` : EMU ITR6 |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 58 | |
| 59 | # PLM->TF-A Parameter Passing |
| 60 | ------------------------------ |
| 61 | The PLM populates a data structure with image information for the TF-A. The TF-A |
| 62 | uses that data to hand off to the loaded images. The address of the handoff |
| 63 | data structure is passed in the ```PMC_GLOBAL_GLOB_GEN_STORAGE4``` register. |
| 64 | The register is free to be used by other software once the TF-A is bringing up |
| 65 | further firmware images. |