Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 1 | /* |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 2 | * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * ZynqMP system level PM-API functions for ioctl. |
| 9 | */ |
| 10 | |
| 11 | #include <arch_helpers.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 12 | #include <drivers/delay_timer.h> |
| 13 | #include <lib/mmio.h> |
| 14 | #include <plat/common/platform.h> |
Jolly Shah | 16fe5ab | 2019-01-08 11:16:16 -0800 | [diff] [blame] | 15 | #include <zynqmp_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 16 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 17 | #include "pm_api_clock.h" |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 18 | #include "pm_api_ioctl.h" |
| 19 | #include "pm_api_sys.h" |
| 20 | #include "pm_client.h" |
| 21 | #include "pm_common.h" |
| 22 | #include "pm_ipi.h" |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 23 | |
| 24 | /** |
| 25 | * pm_ioctl_get_rpu_oper_mode () - Get current RPU operation mode |
| 26 | * @mode Buffer to store value of oper mode(Split/Lock-step) |
| 27 | * |
| 28 | * This function provides current configured RPU operational mode. |
| 29 | * |
| 30 | * @return Returns status, either success or error+reason |
| 31 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 32 | static enum pm_ret_status pm_ioctl_get_rpu_oper_mode(uint32_t *mode) |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 33 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 34 | uint32_t val; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 35 | |
| 36 | val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL); |
| 37 | val &= ZYNQMP_SLSPLIT_MASK; |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 38 | if (val == 0U) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 39 | *mode = PM_RPU_MODE_LOCKSTEP; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 40 | } else { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 41 | *mode = PM_RPU_MODE_SPLIT; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 42 | } |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 43 | |
| 44 | return PM_RET_SUCCESS; |
| 45 | } |
| 46 | |
| 47 | /** |
| 48 | * pm_ioctl_set_rpu_oper_mode () - Configure RPU operation mode |
| 49 | * @mode Value to set for oper mode(Split/Lock-step) |
| 50 | * |
| 51 | * This function configures RPU operational mode(Split/Lock-step). |
| 52 | * It also sets TCM combined mode in RPU lock-step and TCM non-combined |
| 53 | * mode for RPU split mode. In case of Lock step mode, RPU1's output is |
| 54 | * clamped. |
| 55 | * |
| 56 | * @return Returns status, either success or error+reason |
| 57 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 58 | static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(uint32_t mode) |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 59 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 60 | uint32_t val; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 61 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 62 | if (mmio_read_32(CRL_APB_RST_LPD_TOP) & CRL_APB_RPU_AMBA_RESET) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 63 | return PM_RET_ERROR_ACCESS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 64 | } |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 65 | |
| 66 | val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL); |
| 67 | |
| 68 | if (mode == PM_RPU_MODE_SPLIT) { |
| 69 | val |= ZYNQMP_SLSPLIT_MASK; |
| 70 | val &= ~ZYNQMP_TCM_COMB_MASK; |
| 71 | val &= ~ZYNQMP_SLCLAMP_MASK; |
| 72 | } else if (mode == PM_RPU_MODE_LOCKSTEP) { |
| 73 | val &= ~ZYNQMP_SLSPLIT_MASK; |
| 74 | val |= ZYNQMP_TCM_COMB_MASK; |
| 75 | val |= ZYNQMP_SLCLAMP_MASK; |
| 76 | } else { |
| 77 | return PM_RET_ERROR_ARGS; |
| 78 | } |
| 79 | |
| 80 | mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val); |
| 81 | |
| 82 | return PM_RET_SUCCESS; |
| 83 | } |
| 84 | |
| 85 | /** |
| 86 | * pm_ioctl_config_boot_addr() - Configure RPU boot address |
| 87 | * @nid Node ID of RPU |
| 88 | * @value Value to set for boot address (TCM/OCM) |
| 89 | * |
| 90 | * This function configures RPU boot address(memory). |
| 91 | * |
| 92 | * @return Returns status, either success or error+reason |
| 93 | */ |
| 94 | static enum pm_ret_status pm_ioctl_config_boot_addr(enum pm_node_id nid, |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 95 | uint32_t value) |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 96 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 97 | uint32_t rpu_cfg_addr, val; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 98 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 99 | if (nid == NODE_RPU_0) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 100 | rpu_cfg_addr = ZYNQMP_RPU0_CFG; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 101 | } else if (nid == NODE_RPU_1) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 102 | rpu_cfg_addr = ZYNQMP_RPU1_CFG; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 103 | } else { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 104 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 105 | } |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 106 | |
| 107 | val = mmio_read_32(rpu_cfg_addr); |
| 108 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 109 | if (value == PM_RPU_BOOTMEM_LOVEC) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 110 | val &= ~ZYNQMP_VINITHI_MASK; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 111 | } else if (value == PM_RPU_BOOTMEM_HIVEC) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 112 | val |= ZYNQMP_VINITHI_MASK; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 113 | } else { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 114 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 115 | } |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 116 | |
| 117 | mmio_write_32(rpu_cfg_addr, val); |
| 118 | |
| 119 | return PM_RET_SUCCESS; |
| 120 | } |
| 121 | |
| 122 | /** |
| 123 | * pm_ioctl_config_tcm_comb() - Configure TCM combined mode |
| 124 | * @value Value to set (Split/Combined) |
| 125 | * |
| 126 | * This function configures TCM to be in split mode or combined |
| 127 | * mode. |
| 128 | * |
| 129 | * @return Returns status, either success or error+reason |
| 130 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 131 | static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value) |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 132 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 133 | uint32_t val; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 134 | |
| 135 | val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL); |
| 136 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 137 | if (value == PM_RPU_TCM_SPLIT) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 138 | val &= ~ZYNQMP_TCM_COMB_MASK; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 139 | } else if (value == PM_RPU_TCM_COMB) { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 140 | val |= ZYNQMP_TCM_COMB_MASK; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 141 | } else { |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 142 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 143 | } |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 144 | |
| 145 | mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val); |
| 146 | |
| 147 | return PM_RET_SUCCESS; |
| 148 | } |
| 149 | |
| 150 | /** |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 151 | * pm_ioctl_set_tapdelay_bypass() - Enable/Disable tap delay bypass |
| 152 | * @type Type of tap delay to enable/disable (e.g. QSPI) |
| 153 | * @value Enable/Disable |
| 154 | * |
| 155 | * This function enable/disable tap delay bypass. |
| 156 | * |
| 157 | * @return Returns status, either success or error+reason |
| 158 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 159 | static enum pm_ret_status pm_ioctl_set_tapdelay_bypass(uint32_t type, |
| 160 | uint32_t value) |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 161 | { |
| 162 | if ((value != PM_TAPDELAY_BYPASS_ENABLE && |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 163 | value != PM_TAPDELAY_BYPASS_DISABLE) || type >= PM_TAPDELAY_MAX) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 164 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 165 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 166 | |
| 167 | return pm_mmio_write(IOU_TAPDLY_BYPASS, TAP_DELAY_MASK, value << type); |
| 168 | } |
| 169 | |
| 170 | /** |
| 171 | * pm_ioctl_set_sgmii_mode() - Set SGMII mode for the GEM device |
| 172 | * @nid Node ID of the device |
| 173 | * @value Enable/Disable |
| 174 | * |
| 175 | * This function enable/disable SGMII mode for the GEM device. |
| 176 | * While enabling SGMII mode, it also ties the GEM PCS Signal |
| 177 | * Detect to 1 and selects EMIO for RX clock generation. |
| 178 | * |
| 179 | * @return Returns status, either success or error+reason |
| 180 | */ |
| 181 | static enum pm_ret_status pm_ioctl_set_sgmii_mode(enum pm_node_id nid, |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 182 | uint32_t value) |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 183 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 184 | uint32_t val, mask, shift; |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 185 | enum pm_ret_status ret; |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 186 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 187 | if (value != PM_SGMII_DISABLE && value != PM_SGMII_ENABLE) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 188 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 189 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 190 | |
| 191 | switch (nid) { |
| 192 | case NODE_ETH_0: |
| 193 | shift = 0; |
| 194 | break; |
| 195 | case NODE_ETH_1: |
| 196 | shift = 1; |
| 197 | break; |
| 198 | case NODE_ETH_2: |
| 199 | shift = 2; |
| 200 | break; |
| 201 | case NODE_ETH_3: |
| 202 | shift = 3; |
| 203 | break; |
| 204 | default: |
| 205 | return PM_RET_ERROR_ARGS; |
| 206 | } |
| 207 | |
| 208 | if (value == PM_SGMII_DISABLE) { |
| 209 | mask = GEM_SGMII_MASK << GEM_CLK_CTRL_OFFSET * shift; |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 210 | ret = pm_mmio_write(IOU_GEM_CLK_CTRL, mask, 0U); |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 211 | } else { |
| 212 | /* Tie the GEM PCS Signal Detect to 1 */ |
| 213 | mask = SGMII_SD_MASK << SGMII_SD_OFFSET * shift; |
| 214 | val = SGMII_PCS_SD_1 << SGMII_SD_OFFSET * shift; |
| 215 | ret = pm_mmio_write(IOU_GEM_CTRL, mask, val); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 216 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 217 | return ret; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 218 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 219 | |
| 220 | /* Set the GEM to SGMII mode */ |
| 221 | mask = GEM_CLK_CTRL_MASK << GEM_CLK_CTRL_OFFSET * shift; |
| 222 | val = GEM_RX_SRC_SEL_GTR | GEM_SGMII_MODE; |
| 223 | val <<= GEM_CLK_CTRL_OFFSET * shift; |
| 224 | ret = pm_mmio_write(IOU_GEM_CLK_CTRL, mask, val); |
| 225 | } |
| 226 | |
| 227 | return ret; |
| 228 | } |
| 229 | |
| 230 | /** |
| 231 | * pm_ioctl_sd_dll_reset() - Reset DLL logic |
| 232 | * @nid Node ID of the device |
| 233 | * @type Reset type |
| 234 | * |
| 235 | * This function resets DLL logic for the SD device. |
| 236 | * |
| 237 | * @return Returns status, either success or error+reason |
| 238 | */ |
| 239 | static enum pm_ret_status pm_ioctl_sd_dll_reset(enum pm_node_id nid, |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 240 | uint32_t type) |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 241 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 242 | uint32_t mask, val; |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 243 | enum pm_ret_status ret; |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 244 | |
| 245 | if (nid == NODE_SD_0) { |
| 246 | mask = ZYNQMP_SD0_DLL_RST_MASK; |
| 247 | val = ZYNQMP_SD0_DLL_RST; |
| 248 | } else if (nid == NODE_SD_1) { |
| 249 | mask = ZYNQMP_SD1_DLL_RST_MASK; |
| 250 | val = ZYNQMP_SD1_DLL_RST; |
| 251 | } else { |
| 252 | return PM_RET_ERROR_ARGS; |
| 253 | } |
| 254 | |
| 255 | switch (type) { |
| 256 | case PM_DLL_RESET_ASSERT: |
| 257 | case PM_DLL_RESET_PULSE: |
| 258 | ret = pm_mmio_write(ZYNQMP_SD_DLL_CTRL, mask, val); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 259 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 260 | return ret; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 261 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 262 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 263 | if (type == PM_DLL_RESET_ASSERT) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 264 | break; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 265 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 266 | mdelay(1); |
Daniel Boulby | 8942a1b | 2018-06-22 14:16:03 +0100 | [diff] [blame] | 267 | /* Fallthrough */ |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 268 | case PM_DLL_RESET_RELEASE: |
| 269 | ret = pm_mmio_write(ZYNQMP_SD_DLL_CTRL, mask, 0); |
| 270 | break; |
| 271 | default: |
| 272 | ret = PM_RET_ERROR_ARGS; |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 273 | break; |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | return ret; |
| 277 | } |
| 278 | |
| 279 | /** |
| 280 | * pm_ioctl_sd_set_tapdelay() - Set tap delay for the SD device |
| 281 | * @nid Node ID of the device |
| 282 | * @type Type of tap delay to set (input/output) |
| 283 | * @value Value to set fot the tap delay |
| 284 | * |
| 285 | * This function sets input/output tap delay for the SD device. |
| 286 | * |
| 287 | * @return Returns status, either success or error+reason |
| 288 | */ |
| 289 | static enum pm_ret_status pm_ioctl_sd_set_tapdelay(enum pm_node_id nid, |
| 290 | enum tap_delay_type type, |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 291 | uint32_t value) |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 292 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 293 | uint32_t shift; |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 294 | enum pm_ret_status ret; |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 295 | uint32_t val, mask; |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 296 | |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 297 | if (nid == NODE_SD_0) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 298 | shift = 0; |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 299 | mask = ZYNQMP_SD0_DLL_RST_MASK; |
| 300 | } else if (nid == NODE_SD_1) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 301 | shift = ZYNQMP_SD_TAP_OFFSET; |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 302 | mask = ZYNQMP_SD1_DLL_RST_MASK; |
| 303 | } else { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 304 | return PM_RET_ERROR_ARGS; |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 305 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 306 | |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 307 | ret = pm_mmio_read(ZYNQMP_SD_DLL_CTRL, &val); |
| 308 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 309 | return ret; |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 310 | } |
| 311 | |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 312 | if ((val & mask) == 0U) { |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 313 | ret = pm_ioctl_sd_dll_reset(nid, PM_DLL_RESET_ASSERT); |
| 314 | if (ret != PM_RET_SUCCESS) { |
| 315 | return ret; |
| 316 | } |
| 317 | } |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 318 | |
| 319 | if (type == PM_TAPDELAY_INPUT) { |
| 320 | ret = pm_mmio_write(ZYNQMP_SD_ITAP_DLY, |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 321 | (ZYNQMP_SD_ITAPCHGWIN_MASK << shift), |
| 322 | (ZYNQMP_SD_ITAPCHGWIN << shift)); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 323 | |
| 324 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 325 | goto reset_release; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 326 | } |
| 327 | |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 328 | if (value == 0U) { |
Sai Krishna Potthuri | 15da582 | 2020-10-30 00:09:43 -0600 | [diff] [blame] | 329 | ret = pm_mmio_write(ZYNQMP_SD_ITAP_DLY, |
| 330 | (ZYNQMP_SD_ITAPDLYENA_MASK << |
| 331 | shift), 0); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 332 | } else { |
Sai Krishna Potthuri | 15da582 | 2020-10-30 00:09:43 -0600 | [diff] [blame] | 333 | ret = pm_mmio_write(ZYNQMP_SD_ITAP_DLY, |
| 334 | (ZYNQMP_SD_ITAPDLYENA_MASK << |
| 335 | shift), (ZYNQMP_SD_ITAPDLYENA << |
| 336 | shift)); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 340 | goto reset_release; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 341 | } |
| 342 | |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 343 | ret = pm_mmio_write(ZYNQMP_SD_ITAP_DLY, |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 344 | (ZYNQMP_SD_ITAPDLYSEL_MASK << shift), |
| 345 | (value << shift)); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 346 | |
| 347 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 348 | goto reset_release; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 349 | } |
| 350 | |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 351 | ret = pm_mmio_write(ZYNQMP_SD_ITAP_DLY, |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 352 | (ZYNQMP_SD_ITAPCHGWIN_MASK << shift), 0); |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 353 | } else if (type == PM_TAPDELAY_OUTPUT) { |
| 354 | ret = pm_mmio_write(ZYNQMP_SD_OTAP_DLY, |
Sai Krishna Potthuri | 15da582 | 2020-10-30 00:09:43 -0600 | [diff] [blame] | 355 | (ZYNQMP_SD_OTAPDLYENA_MASK << shift), 0); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 356 | |
| 357 | if (ret != PM_RET_SUCCESS) { |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 358 | goto reset_release; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 359 | } |
| 360 | |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 361 | ret = pm_mmio_write(ZYNQMP_SD_OTAP_DLY, |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 362 | (ZYNQMP_SD_OTAPDLYSEL_MASK << shift), |
| 363 | (value << shift)); |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 364 | } else { |
| 365 | ret = PM_RET_ERROR_ARGS; |
| 366 | } |
| 367 | |
| 368 | reset_release: |
Sai Krishna Potthuri | ad48c50 | 2020-10-20 07:00:06 -0600 | [diff] [blame] | 369 | if ((val & mask) == 0) { |
| 370 | (void)pm_ioctl_sd_dll_reset(nid, PM_DLL_RESET_RELEASE); |
| 371 | } |
| 372 | |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 373 | return ret; |
| 374 | } |
| 375 | |
| 376 | /** |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 377 | * pm_ioctl_set_pll_frac_mode() - Ioctl function for |
| 378 | * setting pll mode |
Jolly Shah | cb5bc75 | 2019-01-02 12:46:46 -0800 | [diff] [blame] | 379 | * @pll PLL clock id |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 380 | * @mode Mode fraction/integar |
| 381 | * |
| 382 | * This function sets PLL mode |
| 383 | * |
| 384 | * @return Returns status, either success or error+reason |
| 385 | */ |
| 386 | static enum pm_ret_status pm_ioctl_set_pll_frac_mode |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 387 | (uint32_t pll, uint32_t mode) |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 388 | { |
Jolly Shah | cb5bc75 | 2019-01-02 12:46:46 -0800 | [diff] [blame] | 389 | return pm_clock_set_pll_mode(pll, mode); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 390 | } |
| 391 | |
| 392 | /** |
| 393 | * pm_ioctl_get_pll_frac_mode() - Ioctl function for |
| 394 | * getting pll mode |
Jolly Shah | 77eb52f | 2019-01-02 12:49:21 -0800 | [diff] [blame] | 395 | * @pll PLL clock id |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 396 | * @mode Mode fraction/integar |
| 397 | * |
| 398 | * This function return current PLL mode |
| 399 | * |
| 400 | * @return Returns status, either success or error+reason |
| 401 | */ |
| 402 | static enum pm_ret_status pm_ioctl_get_pll_frac_mode |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 403 | (uint32_t pll, uint32_t *mode) |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 404 | { |
Jolly Shah | 77eb52f | 2019-01-02 12:49:21 -0800 | [diff] [blame] | 405 | return pm_clock_get_pll_mode(pll, mode); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 406 | } |
| 407 | |
| 408 | /** |
| 409 | * pm_ioctl_set_pll_frac_data() - Ioctl function for |
| 410 | * setting pll fraction data |
Jolly Shah | 68116ef | 2019-01-02 12:42:56 -0800 | [diff] [blame] | 411 | * @pll PLL clock id |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 412 | * @data fraction data |
| 413 | * |
| 414 | * This function sets fraction data. |
| 415 | * It is valid for fraction mode only. |
| 416 | * |
| 417 | * @return Returns status, either success or error+reason |
| 418 | */ |
| 419 | static enum pm_ret_status pm_ioctl_set_pll_frac_data |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 420 | (uint32_t pll, uint32_t data) |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 421 | { |
Jolly Shah | 68116ef | 2019-01-02 12:42:56 -0800 | [diff] [blame] | 422 | enum pm_node_id pll_nid; |
| 423 | enum pm_ret_status status; |
| 424 | |
| 425 | /* Get PLL node ID using PLL clock ID */ |
| 426 | status = pm_clock_get_pll_node_id(pll, &pll_nid); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 427 | if (status != PM_RET_SUCCESS) { |
Jolly Shah | 68116ef | 2019-01-02 12:42:56 -0800 | [diff] [blame] | 428 | return status; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 429 | } |
Jolly Shah | 68116ef | 2019-01-02 12:42:56 -0800 | [diff] [blame] | 430 | |
| 431 | return pm_pll_set_parameter(pll_nid, PM_PLL_PARAM_DATA, data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | /** |
| 435 | * pm_ioctl_get_pll_frac_data() - Ioctl function for |
| 436 | * getting pll fraction data |
Jolly Shah | b4c9946 | 2019-01-02 12:40:17 -0800 | [diff] [blame] | 437 | * @pll PLL clock id |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 438 | * @data fraction data |
| 439 | * |
| 440 | * This function returns fraction data value. |
| 441 | * |
| 442 | * @return Returns status, either success or error+reason |
| 443 | */ |
| 444 | static enum pm_ret_status pm_ioctl_get_pll_frac_data |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 445 | (uint32_t pll, uint32_t *data) |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 446 | { |
Jolly Shah | b4c9946 | 2019-01-02 12:40:17 -0800 | [diff] [blame] | 447 | enum pm_node_id pll_nid; |
| 448 | enum pm_ret_status status; |
| 449 | |
| 450 | /* Get PLL node ID using PLL clock ID */ |
| 451 | status = pm_clock_get_pll_node_id(pll, &pll_nid); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 452 | if (status != PM_RET_SUCCESS) { |
Jolly Shah | b4c9946 | 2019-01-02 12:40:17 -0800 | [diff] [blame] | 453 | return status; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 454 | } |
Jolly Shah | b4c9946 | 2019-01-02 12:40:17 -0800 | [diff] [blame] | 455 | |
| 456 | return pm_pll_get_parameter(pll_nid, PM_PLL_PARAM_DATA, data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | /** |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 460 | * pm_ioctl_write_ggs() - Ioctl function for writing |
| 461 | * global general storage (ggs) |
| 462 | * @index GGS register index |
| 463 | * @value Register value to be written |
| 464 | * |
| 465 | * This function writes value to GGS register. |
| 466 | * |
| 467 | * @return Returns status, either success or error+reason |
| 468 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 469 | static enum pm_ret_status pm_ioctl_write_ggs(uint32_t index, |
| 470 | uint32_t value) |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 471 | { |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 472 | if (index >= GGS_NUM_REGS) { |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 473 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 474 | } |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 475 | |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 476 | return pm_mmio_write(GGS_BASEADDR + (index << 2), |
| 477 | 0xFFFFFFFFU, value); |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 478 | } |
| 479 | |
| 480 | /** |
| 481 | * pm_ioctl_read_ggs() - Ioctl function for reading |
| 482 | * global general storage (ggs) |
| 483 | * @index GGS register index |
| 484 | * @value Register value |
| 485 | * |
| 486 | * This function returns GGS register value. |
| 487 | * |
| 488 | * @return Returns status, either success or error+reason |
| 489 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 490 | static enum pm_ret_status pm_ioctl_read_ggs(uint32_t index, |
| 491 | uint32_t *value) |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 492 | { |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 493 | if (index >= GGS_NUM_REGS) { |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 494 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 495 | } |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 496 | |
| 497 | return pm_mmio_read(GGS_BASEADDR + (index << 2), value); |
| 498 | } |
| 499 | |
| 500 | /** |
| 501 | * pm_ioctl_write_pggs() - Ioctl function for writing persistent |
| 502 | * global general storage (pggs) |
| 503 | * @index PGGS register index |
| 504 | * @value Register value to be written |
| 505 | * |
| 506 | * This function writes value to PGGS register. |
| 507 | * |
| 508 | * @return Returns status, either success or error+reason |
| 509 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 510 | static enum pm_ret_status pm_ioctl_write_pggs(uint32_t index, |
| 511 | uint32_t value) |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 512 | { |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 513 | if (index >= PGGS_NUM_REGS) { |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 514 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 515 | } |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 516 | |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 517 | return pm_mmio_write(PGGS_BASEADDR + (index << 2), |
| 518 | 0xFFFFFFFFU, value); |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | /** |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 522 | * pm_ioctl_afi() - Ioctl function for writing afi values |
| 523 | * |
| 524 | * @index AFI register index |
| 525 | * @value Register value to be written |
| 526 | * |
| 527 | * |
| 528 | * @return Returns status, either success or error+reason |
| 529 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 530 | static enum pm_ret_status pm_ioctl_afi(uint32_t index, |
| 531 | uint32_t value) |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 532 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 533 | uint32_t mask; |
| 534 | uint32_t regarr[] = {0xFD360000U, |
Venkatesh Yadav Abbarapu | ed4f1e8 | 2022-04-29 09:58:30 +0530 | [diff] [blame] | 535 | 0xFD360014U, |
| 536 | 0xFD370000U, |
| 537 | 0xFD370014U, |
| 538 | 0xFD380000U, |
| 539 | 0xFD380014U, |
| 540 | 0xFD390000U, |
| 541 | 0xFD390014U, |
| 542 | 0xFD3a0000U, |
| 543 | 0xFD3a0014U, |
| 544 | 0xFD3b0000U, |
| 545 | 0xFD3b0014U, |
| 546 | 0xFF9b0000U, |
| 547 | 0xFF9b0014U, |
| 548 | 0xFD615000U, |
| 549 | 0xFF419000U, |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 550 | }; |
| 551 | |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 552 | if (index >= ARRAY_SIZE(regarr)) { |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 553 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 554 | } |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 555 | |
Akshay Belsare | af00b31 | 2022-08-23 11:39:35 +0530 | [diff] [blame] | 556 | if (index <= AFIFM6_WRCTRL) { |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 557 | mask = FABRIC_WIDTH; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 558 | } else { |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 559 | mask = 0xf00; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 560 | } |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 561 | |
| 562 | return pm_mmio_write(regarr[index], mask, value); |
| 563 | } |
| 564 | |
| 565 | /** |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 566 | * pm_ioctl_read_pggs() - Ioctl function for reading persistent |
| 567 | * global general storage (pggs) |
| 568 | * @index PGGS register index |
| 569 | * @value Register value |
| 570 | * |
| 571 | * This function returns PGGS register value. |
| 572 | * |
| 573 | * @return Returns status, either success or error+reason |
| 574 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 575 | static enum pm_ret_status pm_ioctl_read_pggs(uint32_t index, |
| 576 | uint32_t *value) |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 577 | { |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 578 | if (index >= PGGS_NUM_REGS) { |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 579 | return PM_RET_ERROR_ARGS; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 580 | } |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 581 | |
| 582 | return pm_mmio_read(PGGS_BASEADDR + (index << 2), value); |
| 583 | } |
| 584 | |
| 585 | /** |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 586 | * pm_ioctl_ulpi_reset() - Ioctl function for performing ULPI reset |
| 587 | * |
| 588 | * This function peerforms the ULPI reset sequence for resetting |
| 589 | * the ULPI transceiver. |
| 590 | * |
| 591 | * @return Returns status, either success or error+reason |
| 592 | */ |
| 593 | static enum pm_ret_status pm_ioctl_ulpi_reset(void) |
| 594 | { |
| 595 | enum pm_ret_status ret; |
| 596 | |
| 597 | ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, |
| 598 | ZYNQMP_ULPI_RESET_VAL_HIGH); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 599 | if (ret != PM_RET_SUCCESS) { |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 600 | return ret; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 601 | } |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 602 | |
| 603 | /* Drive ULPI assert for atleast 1ms */ |
| 604 | mdelay(1); |
| 605 | |
| 606 | ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, |
| 607 | ZYNQMP_ULPI_RESET_VAL_LOW); |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 608 | if (ret != PM_RET_SUCCESS) { |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 609 | return ret; |
Venkatesh Yadav Abbarapu | 987fad3 | 2022-04-29 13:52:00 +0530 | [diff] [blame] | 610 | } |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 611 | |
| 612 | /* Drive ULPI de-assert for atleast 1ms */ |
| 613 | mdelay(1); |
| 614 | |
| 615 | ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, |
| 616 | ZYNQMP_ULPI_RESET_VAL_HIGH); |
| 617 | |
| 618 | return ret; |
| 619 | } |
| 620 | |
| 621 | /** |
Siva Durga Prasad Paladugu | ac8526f | 2018-09-04 17:12:51 +0530 | [diff] [blame] | 622 | * pm_ioctl_set_boot_health_status() - Ioctl for setting healthy boot status |
| 623 | * |
| 624 | * This function sets healthy bit value to indicate boot health status |
| 625 | * to firmware. |
| 626 | * |
| 627 | * @return Returns status, either success or error+reason |
| 628 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 629 | static enum pm_ret_status pm_ioctl_set_boot_health_status(uint32_t value) |
Siva Durga Prasad Paladugu | ac8526f | 2018-09-04 17:12:51 +0530 | [diff] [blame] | 630 | { |
Tejas Patel | 6552a55 | 2020-11-22 23:37:55 -0800 | [diff] [blame] | 631 | return pm_mmio_write(PMU_GLOBAL_GEN_STORAGE4, |
Siva Durga Prasad Paladugu | ac8526f | 2018-09-04 17:12:51 +0530 | [diff] [blame] | 632 | PM_BOOT_HEALTH_STATUS_MASK, value); |
| 633 | } |
| 634 | |
| 635 | /** |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 636 | * pm_api_ioctl() - PM IOCTL API for device control and configs |
| 637 | * @node_id Node ID of the device |
| 638 | * @ioctl_id ID of the requested IOCTL |
| 639 | * @arg1 Argument 1 to requested IOCTL call |
| 640 | * @arg2 Argument 2 to requested IOCTL call |
| 641 | * @value Returned output value |
| 642 | * |
| 643 | * This function calls IOCTL to firmware for device control and configuration. |
| 644 | * |
| 645 | * @return Returns status, either success or error+reason |
| 646 | */ |
| 647 | enum pm_ret_status pm_api_ioctl(enum pm_node_id nid, |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 648 | uint32_t ioctl_id, |
| 649 | uint32_t arg1, |
| 650 | uint32_t arg2, |
| 651 | uint32_t *value) |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 652 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 653 | enum pm_ret_status ret; |
Rajan Vaja | 0c0615a | 2021-10-12 03:30:09 -0700 | [diff] [blame] | 654 | uint32_t payload[PAYLOAD_ARG_CNT]; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 655 | |
| 656 | switch (ioctl_id) { |
| 657 | case IOCTL_GET_RPU_OPER_MODE: |
| 658 | ret = pm_ioctl_get_rpu_oper_mode(value); |
| 659 | break; |
| 660 | case IOCTL_SET_RPU_OPER_MODE: |
| 661 | ret = pm_ioctl_set_rpu_oper_mode(arg1); |
| 662 | break; |
| 663 | case IOCTL_RPU_BOOT_ADDR_CONFIG: |
| 664 | ret = pm_ioctl_config_boot_addr(nid, arg1); |
| 665 | break; |
| 666 | case IOCTL_TCM_COMB_CONFIG: |
| 667 | ret = pm_ioctl_config_tcm_comb(arg1); |
| 668 | break; |
Rajan Vaja | aea41bb | 2018-01-17 02:39:24 -0800 | [diff] [blame] | 669 | case IOCTL_SET_TAPDELAY_BYPASS: |
| 670 | ret = pm_ioctl_set_tapdelay_bypass(arg1, arg2); |
| 671 | break; |
| 672 | case IOCTL_SET_SGMII_MODE: |
| 673 | ret = pm_ioctl_set_sgmii_mode(nid, arg1); |
| 674 | break; |
| 675 | case IOCTL_SD_DLL_RESET: |
| 676 | ret = pm_ioctl_sd_dll_reset(nid, arg1); |
| 677 | break; |
| 678 | case IOCTL_SET_SD_TAPDELAY: |
| 679 | ret = pm_ioctl_sd_set_tapdelay(nid, arg1, arg2); |
| 680 | break; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 681 | case IOCTL_SET_PLL_FRAC_MODE: |
| 682 | ret = pm_ioctl_set_pll_frac_mode(arg1, arg2); |
| 683 | break; |
| 684 | case IOCTL_GET_PLL_FRAC_MODE: |
| 685 | ret = pm_ioctl_get_pll_frac_mode(arg1, value); |
| 686 | break; |
| 687 | case IOCTL_SET_PLL_FRAC_DATA: |
| 688 | ret = pm_ioctl_set_pll_frac_data(arg1, arg2); |
| 689 | break; |
| 690 | case IOCTL_GET_PLL_FRAC_DATA: |
| 691 | ret = pm_ioctl_get_pll_frac_data(arg1, value); |
| 692 | break; |
Rajan Vaja | 393c0a2 | 2018-01-17 02:39:27 -0800 | [diff] [blame] | 693 | case IOCTL_WRITE_GGS: |
| 694 | ret = pm_ioctl_write_ggs(arg1, arg2); |
| 695 | break; |
| 696 | case IOCTL_READ_GGS: |
| 697 | ret = pm_ioctl_read_ggs(arg1, value); |
| 698 | break; |
| 699 | case IOCTL_WRITE_PGGS: |
| 700 | ret = pm_ioctl_write_pggs(arg1, arg2); |
| 701 | break; |
| 702 | case IOCTL_READ_PGGS: |
| 703 | ret = pm_ioctl_read_pggs(arg1, value); |
| 704 | break; |
Siva Durga Prasad Paladugu | ed1d5cb | 2018-09-04 17:03:25 +0530 | [diff] [blame] | 705 | case IOCTL_ULPI_RESET: |
| 706 | ret = pm_ioctl_ulpi_reset(); |
| 707 | break; |
Siva Durga Prasad Paladugu | ac8526f | 2018-09-04 17:12:51 +0530 | [diff] [blame] | 708 | case IOCTL_SET_BOOT_HEALTH_STATUS: |
| 709 | ret = pm_ioctl_set_boot_health_status(arg1); |
| 710 | break; |
Siva Durga Prasad Paladugu | a22b885 | 2018-09-04 17:27:12 +0530 | [diff] [blame] | 711 | case IOCTL_AFI: |
| 712 | ret = pm_ioctl_afi(arg1, arg2); |
| 713 | break; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 714 | default: |
Rajan Vaja | 0c0615a | 2021-10-12 03:30:09 -0700 | [diff] [blame] | 715 | /* Send request to the PMU */ |
| 716 | PM_PACK_PAYLOAD5(payload, PM_IOCTL, nid, ioctl_id, arg1, arg2); |
| 717 | |
| 718 | ret = pm_ipi_send_sync(primary_proc, payload, value, 1); |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 719 | break; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 720 | } |
| 721 | |
| 722 | return ret; |
| 723 | } |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 724 | |
| 725 | /** |
| 726 | * pm_update_ioctl_bitmask() - API to get supported IOCTL ID mask |
| 727 | * @bit_mask Returned bit mask of supported IOCTL IDs |
| 728 | */ |
| 729 | enum pm_ret_status atf_ioctl_bitmask(uint32_t *bit_mask) |
| 730 | { |
| 731 | uint8_t supported_ids[] = { |
| 732 | IOCTL_GET_RPU_OPER_MODE, |
| 733 | IOCTL_SET_RPU_OPER_MODE, |
| 734 | IOCTL_RPU_BOOT_ADDR_CONFIG, |
| 735 | IOCTL_TCM_COMB_CONFIG, |
| 736 | IOCTL_SET_TAPDELAY_BYPASS, |
| 737 | IOCTL_SET_SGMII_MODE, |
| 738 | IOCTL_SD_DLL_RESET, |
| 739 | IOCTL_SET_SD_TAPDELAY, |
| 740 | IOCTL_SET_PLL_FRAC_MODE, |
| 741 | IOCTL_GET_PLL_FRAC_MODE, |
| 742 | IOCTL_SET_PLL_FRAC_DATA, |
| 743 | IOCTL_GET_PLL_FRAC_DATA, |
| 744 | IOCTL_WRITE_GGS, |
| 745 | IOCTL_READ_GGS, |
| 746 | IOCTL_WRITE_PGGS, |
| 747 | IOCTL_READ_PGGS, |
| 748 | IOCTL_ULPI_RESET, |
| 749 | IOCTL_SET_BOOT_HEALTH_STATUS, |
| 750 | IOCTL_AFI, |
| 751 | }; |
| 752 | uint8_t i, ioctl_id; |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 753 | int32_t ret; |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 754 | |
| 755 | for (i = 0U; i < ARRAY_SIZE(supported_ids); i++) { |
| 756 | ioctl_id = supported_ids[i]; |
| 757 | if (ioctl_id >= 64U) { |
| 758 | return PM_RET_ERROR_NOTSUPPORTED; |
| 759 | } |
| 760 | ret = check_api_dependency(ioctl_id); |
| 761 | if (ret == PM_RET_SUCCESS) { |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 762 | bit_mask[ioctl_id / 32U] |= BIT(ioctl_id % 32U); |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 763 | } |
| 764 | } |
| 765 | |
| 766 | return PM_RET_SUCCESS; |
| 767 | } |